Q1
(a) In Figure 1(a) shown below, the two-port network is characterized in terms of y-parameters with y₁₁ = 3·3 × 10⁻³ S, y₂₂ = 5 × 10⁻³ S and y₁₂ = y₂₁ = 0. Find the voltage across 200 Ω load. (10 marks) (b) For the signal shown in Figure 1(b), calculate the total energy of the signal X(t). Also sketch y(t) = X(10t – 5). (10 marks) (c) A 220 V dc shunt motor has armature resistance Rₐ = 0·13 Ω, field resistance Rf = 250 Ω and rotational loss 230 W. On full-load, the line current is 9·5 A with the motor running at 1440 rpm. Determine the following: (i) The mechanical power developed (ii) The power output (iii) The load torque (iv) The full-load efficiency (10 marks) (d) For the transistor circuit shown in Figure 1(d), determine the value of reverse saturation current, I_S, that would give a collector current of 1 mA, if β = 80, V_A = ∞ and V_T = 26 mV at T = 300 K. (10 marks) (e) Consider the four variables logic function defined as follows: F (A, B, C, D) = ĀC + ĀD + B̄C + B̄D + ABC̄ D̄ Assuming input variables as A, B, C and D, propose a logic circuit using only three logic gates to implement the function. (10 marks)
हिंदी में प्रश्न पढ़ें
(a) चित्र 1(a) में प्रदर्शित द्वि-प्रद्वार जालक्रम के, y-प्राचलों y₁₁ = 3·3 × 10⁻³ S, y₂₂ = 5 × 10⁻³ S तथा y₁₂ = y₂₁ = 0 के रूप में लक्षण बताए गए हैं । 200 Ω भार के आर-पार वोल्टता का मान ज्ञात कीजिए । (10 अंक) (b) चित्र 1(b) में प्रदर्शित संकेत के लिए, संकेत X(t) की संपूर्ण ऊर्जा की गणना कीजिए । y(t) = X(10t – 5) का आरेखण भी कीजिए । (10 अंक) (c) एक 220 V dc समानान्तर क्रम मोटर का, आर्मेचर प्रतिरोध Rₐ = 0·13 Ω, क्षेत्र प्रतिरोध Rf = 250 Ω तथा घूर्णन हान 230 W है । मोटर के 1440 rpm पर पूर्ण भार पर चलते समय लाइन धारा का मान 9·5 A है । निम्नलिखित का मान ज्ञात कीजिए : (i) विकसित (उत्पन्न) यांत्रिक शक्ति (ii) निर्गत शक्ति (iii) भार (लोड) बल-आघूर्ण (iv) पूर्ण भार दक्षता (10 अंक) (d) चित्र 1(d) में प्रदर्शित ट्रांजिस्टर परिपथ के लिए, व्युत्क्रम संतृप्त धारा I_S का वह मान ज्ञात कीजिए जो संग्राहक धारा का मान 1 mA कर दे, यदि T = 300 K पर β = 80, V_A = ∞ तथा V_T = 26 mV हो । (10 अंक) (e) निम्नानुसार परिभाषित चतुर्वर तार्किक फलन पर विचार कीजिए : F (A, B, C, D) = ĀC + ĀD + B̄C + B̄D + ABC̄ D̄ A, B, C और D को निवेश चर मानकर केवल तीन तार्किक द्वारों का प्रयोग करते हुए इस फलन के कार्यान्वयन के लिए तार्किक परिपथ प्रस्तावित कीजिए । (10 अंक)
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How this answer will be evaluated
Approach
Solve each sub-part systematically with clear step-by-step calculations. For part (a), apply y-parameter equations to find load voltage; for (b), compute energy using ∫|x(t)|²dt and apply time-scaling/shifting for the sketch; for (c), calculate motor performance parameters using DC machine equations; for (d), use Ebers-Moll model with given β; for (e), simplify the Boolean expression using K-map or algebraic manipulation to implement with only three gates. Allocate approximately 15% time to (a), 15% to (b), 25% to (c), 15% to (d), and 30% to (e) due to its simplification complexity.
Key points expected
- Part (a): Correct application of y-parameter equations I₁ = y₁₁V₁ + y₁₂V₂ and I₂ = y₂₁V₁ + y₂₂V₂ with y₁₂ = y₂₁ = 0, leading to V₂ = -I₂R_L and solving for load voltage
- Part (b): Energy calculation using E = ∫_{-∞}^{∞} |X(t)|² dt for the given waveform, correct application of time scaling (compression by 10) and time shifting (advance by 0.5s) for y(t) = X(10t-5)
- Part (c)(i)-(iv): Correct calculation of field current I_f = V/R_f, armature current I_a = I_L - I_f, back EMF E_b = V - I_aR_a, mechanical power P_mech = E_b × I_a, output power P_out = P_mech - rotational losses, torque T = P_out/ω, and efficiency η = P_out/(V×I_L)
- Part (d): Application of I_C = βI_B with I_B = I_S(e^{V_BE/V_T} - 1), using active mode assumption and given β = 80, V_T = 26mV to solve for I_S
- Part (e): Boolean simplification of F = ĀC + ĀD + B̄C + B̄D + ABC̄D̄ to minimal form using consensus theorem or K-map, resulting in implementation using only three logic gates (e.g., two AND-OR or NAND-NAND structure)
- Correct unit handling throughout (Siemens, Volts, Amperes, Watts, rad/s, Nm) and proper significant figures in final answers
Evaluation rubric
| Dimension | Weight | Max marks | Excellent | Average | Poor |
|---|---|---|---|---|---|
| Concept correctness | 20% | 10 | Correctly identifies and applies: two-port network theory for (a), signal energy definition and time transformation properties for (b), DC motor equivalent circuit and power flow for (c), BJT current equations in active region for (d), and Boolean algebra theorems for (e); no conceptual errors in any sub-part | Mostly correct concepts with minor errors in one sub-part, such as confusing h-parameters with y-parameters, or misapplying time-scaling vs time-shifting, or incorrect power flow direction in motor | Fundamental conceptual errors in multiple sub-parts, such as using Z-parameters instead of Y-parameters, calculating power as V×I without considering losses, or incorrect Boolean simplification approach |
| Numerical accuracy | 20% | 10 | All calculations accurate to appropriate significant figures: load voltage in (a), energy value in (b), all four motor parameters in (c), I_S in (d); correct arithmetic with proper unit conversions (mV to V, rpm to rad/s) | Correct methodology but arithmetic errors in 1-2 sub-parts, such as calculation mistakes in back EMF or torque, or incorrect exponent handling in I_S calculation | Multiple calculation errors, wrong order of magnitude results, or missing units; significant errors in motor efficiency or completely wrong I_S value |
| Diagram quality | 15% | 7.5 | Clear sketch for (b) showing original X(t), intermediate steps (X(10t) compression, then X(10t-5) shift), with labeled axes, amplitude scaling, and time markers; circuit diagram for (e) with proper gate symbols and connections | Sketch present but missing intermediate steps or unclear time axis labels; circuit diagram for (e) functional but with minor drawing issues | Missing sketch for (b), or completely wrong transformation shown; no circuit diagram for (e), or diagram that cannot implement the function |
| Step-by-step derivation | 25% | 12.5 | Complete derivation chain visible: y-parameter matrix setup → load condition equations → solution for (a); integral setup with limits → evaluation for (b); equivalent circuit → current distribution → sequential power calculations for (c); KVL → diode equation → algebraic solution for (d); K-map/algebraic steps → minimized expression → gate realization for (e) | Most steps shown but with gaps in derivation, such as jumping from y-parameters to answer without showing load equation, or stating final Boolean form without simplification steps | Minimal working shown, mostly final answers without derivation, or incorrect steps that don't logically follow; 'answer only' approach with no method visibility |
| Practical interpretation | 20% | 10 | Interprets results physically: comments on unilateral nature of network in (a), discusses energy concentration in (b), assesses motor efficiency typicality (~80% for small DC motor) and torque-speed implications in (c), notes reasonableness of I_S magnitude (pA to nA range) in (d), and explains gate minimization importance for IC design in (e) | Brief comment on 1-2 sub-parts without depth, such as noting efficiency value is reasonable, or mentioning that fewer gates reduce cost | No physical interpretation provided; purely mathematical treatment without connecting to engineering significance or real-world device behavior |
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