Electrical Engineering 2023 Paper II 50 marks Solve

Q3

(a) Write the state and output equations for the system shown in the figure. Choose state variables x₁ and x₂ as shown in the figure. Check the controllability and observability of the system : 20 marks (b) (i) Differentiate between full decoding and partial decoding techniques used by 8085 microprocessor to decode an address. Give advantages and disadvantages of each technique. 10 marks (ii) Discuss with example how BCD number addition is performed using DAA instruction of 8085 microprocessor. 10 marks (c) A 6600 V, 50 Hz, single-core, lead-sheathed cable has the following data : Conductor diameter = 1·6 cm Length = 5 km Internal diameter of the sheath = 3·2 cm Resistivity of insulation = 1·5×10¹² Ω-m Relative permittivity of insulation = 3·8 Calculate the insulation resistance, capacitance and the maximum electric stress in the insulation. 10 marks

हिंदी में प्रश्न पढ़ें

(a) नीचे दिए गए चित्र में प्रदर्शित तंत्र के लिए अवस्था एवं निर्गत समीकरणों को लिखिए। x₁ और x₂ अवस्था चर चुनिए जैसा कि चित्र में दिया गया है। तंत्र की नियंत्रणीयता एवं प्रेक्षणीयता जाँच कीजिए : 20 अंक (b) (i) एक पता (एड्रेस) को अवकूट करने हेतु 8085 सूक्ष्म-संसाधित्र (माइक्रोप्रोसेसर) द्वारा उपयोग की जाने वाली पूर्ण अवकूटन एवं आंशिक अवकूटन तकनीकों में अंतर स्पष्ट कीजिए। प्रत्येक तकनीक के लाभों एवं हानियों को लिखिए। 10 अंक (ii) 8085 सूक्ष्म-संसाधित्र (माइक्रोप्रोसेसर) के डी० ए० ए० निर्देश का उपयोग करते हुए किस प्रकार बी० सी० डी० संख्याओं का योग संपादित किया जाता है, उदाहरण सहित चर्चा कीजिए। 10 अंक (c) एक 6600 V, 50 Hz, एकल-कोर, सीसा-आच्छादित केबल के निम्नलिखित डाटा हैं : चालक व्यास = 1·6 cm लम्बाई = 5 km आच्छद का आंतरिक व्यास = 3·2 cm अचालक की प्रतिरोधकता = 1·5×10¹² Ω-m अचालक की सापेक्ष विद्युतशीलता (परमिटिविटी) = 3·8 अचालक प्रतिरोध, संधारिता एवं अचालक में अधिकतम विद्युत प्रतिबल ज्ञात कीजिए। 10 अंक

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How this answer will be evaluated

Approach

Begin by deriving state-space representation for part (a) using the given block diagram, then apply Kalman's controllability and observability tests. For part (b), contrast full and partial decoding with memory mapping examples, then illustrate DAA with a concrete BCD addition like 38+25. Conclude with part (c) by calculating cable parameters using standard formulae for cylindrical geometry. Allocate approximately 40% time to (a), 20% to (b)(i), 20% to (b)(ii), and 20% to (c) based on mark distribution.

Key points expected

  • Part (a): Correct state equations ẋ = Ax + Bu and output y = Cx + Du derived from block diagram; controllability matrix [B AB] and observability matrix [C; CA] computed with rank determination
  • Part (b)(i): Clear distinction between full decoding (all address lines decoded, unique addresses) and partial decoding (some lines unused, address overlap); advantages (hardware simplicity vs. complete utilization) and disadvantages (address ambiguity vs. complexity) stated
  • Part (b)(ii): DAA instruction operation explained: addition first, then adjustment if lower nibble >9 or AC=1, and if upper nibble >9 or CY=1; concrete example like 88H + 88H = 10H (with carry) then DAA gives 76H with CY=1
  • Part (c): Insulation resistance R = ρln(r₂/r₁)/(2πL) calculated correctly; capacitance C = 2πε₀εᵣL/ln(r₂/r₁) computed; maximum electric stress E_max = V/(r₁·ln(r₂/r₁)) at conductor surface determined
  • Part (c): Proper unit conversions (cm to m, km to m) and final values with correct units (MΩ, μF, kV/cm or MV/m) presented

Evaluation rubric

DimensionWeightMax marksExcellentAveragePoor
Concept correctness25%12.5Correctly identifies state variables from block diagram; applies Kalman's rank tests properly for (a); accurately explains 8085 decoding concepts and DAA flag conditions for (b); uses correct cylindrical cable formulae for (c) with proper understanding of electric stress distributionMinor errors in state equation signs or missing one rank test; decoding explanation lacks clarity on address overlap; DAA explanation misses one adjustment condition; cable formula correct but conceptual understanding of stress concentration at conductor surface weakFundamental misunderstanding of state-space representation; confuses full/partial decoding; fails to explain DAA adjustment mechanism; uses wrong geometry (parallel plate) for cable calculations
Numerical accuracy20%10All calculations in (c) correct: R ≈ 132 MΩ, C ≈ 0.42 μF, E_max ≈ 11.9 kV/mm (or equivalent); proper handling of ln(2) and ε₀ = 8.854×10⁻¹²; no unit conversion errorsCorrect formulae but arithmetic errors (e.g., factor of 10 in resistivity or length conversion); final answers within 20% of correct values; units inconsistent or missingMajor calculation errors; wrong formulae applied; orders of magnitude off; no unit awareness
Diagram quality15%7.5Clear reproduction of block diagram for (a) with labeled state variables; memory map diagrams for full vs. partial decoding in (b)(i); flowchart or register-level diagram for DAA operation; cable cross-section showing field distribution for (c)Block diagram present but labels unclear or incomplete; textual description substitutes for decoding diagrams; cable diagram basic without field linesNo diagrams despite question referencing a figure; messy or irrelevant sketches; missing critical labels
Step-by-step derivation25%12.5Systematic derivation: from block diagram to transfer function to state equations for (a); explicit matrix formation and rank calculation; for (c), clear substitution sequence with intermediate steps shown; DAA example walks through flag changes stepwiseJumps between steps without justification; skips rank calculation details; cable calculation shows final formula only; example lacks register state trackingNo derivation shown—only final answers; illogical sequence; missing critical steps like controllability matrix construction
Practical interpretation15%7.5Interprets controllability/observability implications for system design; discusses memory wastage in partial decoding for Indian embedded systems; explains why DAA matters for decimal arithmetic in financial applications; relates cable stress to insulation material selection for 11kV distribution networksBrief mention of practical relevance without elaboration; generic statements about importance; no India-specific contextNo interpretation attempted; purely mathematical treatment; fails to connect theory to engineering practice

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