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Electrical Engineering 2023 Paper II 50 marks Solve

Paper II — Q3

(a) Write the state and output equations for the system shown in the figure. Choose state variables x₁ and x₂ as shown in the…

(a)

Write the state and output equations for the system shown in the figure. Choose state variables x₁ and x₂ as shown in the figure. Check the controllability and observability of the system : 20 marks

(b)
(i)

Differentiate between full decoding and partial decoding techniques used by 8085 microprocessor to decode an address. Give advantages and disadvantages of each technique. 10 marks

(ii)

Discuss with example how BCD number addition is performed using DAA instruction of 8085 microprocessor. 10 marks

(c)

A 6600 V, 50 Hz, single-core, lead-sheathed cable has the following data :

Conductor diameter = 1·6 cm

Length = 5 km

Internal diameter of the sheath = 3·2 cm

Resistivity of insulation = 1·5×10¹² Ω-m

Relative permittivity of insulation = 3·8

Calculate the insulation resistance, capacitance and the maximum electric stress in the insulation. 10 marks

हिंदी में प्रश्न पढ़ें
(a)

नीचे दिए गए चित्र में प्रदर्शित तंत्र के लिए अवस्था एवं निर्गत समीकरणों को लिखिए। x₁ और x₂ अवस्था चर चुनिए जैसा कि चित्र में दिया गया है। तंत्र की नियंत्रणीयता एवं प्रेक्षणीयता जाँच कीजिए : 20 अंक

(b)
(i)

एक पता (एड्रेस) को अवकूट करने हेतु 8085 सूक्ष्म-संसाधित्र (माइक्रोप्रोसेसर) द्वारा उपयोग की जाने वाली पूर्ण अवकूटन एवं आंशिक अवकूटन तकनीकों में अंतर स्पष्ट कीजिए। प्रत्येक तकनीक के लाभों एवं हानियों को लिखिए। 10 अंक

(ii)

8085 सूक्ष्म-संसाधित्र (माइक्रोप्रोसेसर) के डी० ए० ए० निर्देश का उपयोग करते हुए किस प्रकार बी० सी० डी० संख्याओं का योग संपादित किया जाता है, उदाहरण सहित चर्चा कीजिए। 10 अंक

(c)

एक 6600 V, 50 Hz, एकल-कोर, सीसा-आच्छादित केबल के निम्नलिखित डाटा हैं :

चालक व्यास = 1·6 cm

लम्बाई = 5 km

आच्छद का आंतरिक व्यास = 3·2 cm

अचालक की प्रतिरोधकता = 1·5×10¹² Ω-m

अचालक की सापेक्ष विद्युतशीलता (परमिटिविटी) = 3·8

अचालक प्रतिरोध, संधारिता एवं अचालक में अधिकतम विद्युत प्रतिबल ज्ञात कीजिए। 10 अंक

Q3 of the 2023 UPSC Mains Electrical Engineering Paper II, as printed
The question as printed in the 2023 Electrical Engineering paper
Evaluate your answer to this question → See all 2023 Electrical Engineering questions

The figure this question refers to, in words

The question paper is a scan and the diagram did not survive as text. This is the figure as read from the original page — every component, value and label — so the question can be worked from the text below.

(a) A block diagram of a control system: Input u enters a first summing junction with a positive sign (+). The output of this summing junction splits into two parallel forward branches: (1) an upper branch passing through a block with transfer function (-5)/(s + 4), whose output is labeled as state variable x1; (2) a lower branch passing through a block with gain 1. The outputs from both branches enter a second summing junction, both with positive signs (+), producing the system output y. From the output y, a feedback path passes through a block with transfer function 1/(s - 1) directed from right to left. The output of this feedback block is labeled as state variable x2, which then feeds into the first summing junction with a negative sign (-).

Model answer

Written by UPSC Answer Check against this question's marking rubric, to the expected length. UPSC does not publish answers for Mains — this is one way to score well, not an official key.

(a) Let the output of the first summing junction be e = u - x₂.

Upper branch: x₁ = (-5/(s + 4))e, so (s + 4)x₁ = -5(u - x₂) dx₁/dt = -4x₁ + 5x₂ - 5u.

Lower branch has gain 1, so its output is e. At the second summing junction, y = x₁ + e = x₁ + u - x₂.

Feedback block: x₂ = (1/(s - 1))y, so (s - 1)x₂ = y dx₂/dt - x₂ = x₁ + u - x₂ dx₂/dt = x₁ + u.

Thus state and output equations are dx₁/dt = -4x₁ + 5x₂ - 5u dx₂/dt = x₁ + 0x₂ + u y = x₁ - x₂ + u.

Matrix form: A = [[-4, 5], [1, 0]], B = [[-5], [1]], C = [1, -1], D = [1].

Controllability by Kalman test: Qc = [B AB]. AB = A B = [[25], [-5]]. Qc = [[-5, 25], [1, -5]]. det(Qc) = (-5)(-5) - (25)(1) = 25 - 25 = 0. Rank(Qc) = 1 < 2, so the system is not controllable.

Observability by Kalman test: O = [C ; C A]. C A = [1, -1][[-4, 5], [1, 0]] = [-5, 5]. O = [[1, -1], [-5, 5]]. det(O) = (1)(5) - (-1)(-5) = 5 - 5 = 0. Rank(O) = 1 < 2, so the system is not observable.

(b)(i) In full decoding, all higher address lines needed to identify a unique memory block are decoded. For example, in a 64 KB 8085 system, A15–A13 may be decoded to select one 8 KB memory chip. Each chip location then has only one address. Advantages: no address aliasing, exact memory map, easy expansion, and no device conflict. Disadvantages: more decoders/gates, higher cost, larger board area, and additional propagation delay.

In partial decoding, only some higher address lines are decoded, while the remaining higher lines are don’t-care. Example: if an 8 KB RAM is selected using only A15 = 0 and A14 = 0, then A13 is ignored. The same 8 KB block appears at multiple address ranges, such as 0000H–1FFFH and 2000H–3FFFH. Advantages: simple and cheap, fewer decoders, and faster selection. Disadvantages: memory aliasing/foldback, wasted address space, possible conflict between devices, and difficult expansion.

(b)(ii) The 8085 DAA instruction is used after ADD or ADC to correct the accumulator for packed BCD addition. DAA checks the auxiliary carry AC and carry CY. If the lower nibble is greater than 9 or AC = 1, it adds 06H. If the upper nibble is greater than 9 or CY = 1, it adds 60H.

Example: add BCD 47 and 35. MVI A, 47H MVI B, 35H ADD B

Binary addition gives A = 7CH. The lower nibble is C, which is greater than 9, so DAA adds 06H: 7CH + 06H = 82H. Final BCD result: 82H, i.e. decimal 82.

For a carry case, 95H + 87H gives A = 1CH with CY = 1. DAA first corrects the lower nibble by adding 06H to get 22H, then corrects for CY by adding 60H to get 82H with CY = 1. Hence the BCD result is 182.

(c) Conductor radius r = 1.6/2 cm = 0.8 cm = 0.008 m. Sheath internal radius R = 3.2/2 cm = 1.6 cm = 0.016 m. Length L = 5 km = 5000 m. ρ = 1.5 × 10¹² Ω-m, εᵣ = 3.8, ε₀ = 8.854 × 10⁻¹² F/m. R/r = 0.016/0.008 = 2, so ln(R/r) = ln 2 = 0.6931.

Insulation resistance: R_ins = ρ ln(R/r) / (2πL) = (1.5 × 10¹² × 0.6931)/(2π × 5000) = 3.31 × 10⁷ Ω = 33.1 MΩ.

Capacitance: C = 2π ε₀ εᵣ L / ln(R/r) = (2π × 8.854 × 10⁻¹² × 3.8 × 5000)/0.6931 = 1.525 × 10⁻⁶ F = 1.525 μF.

Maximum electric stress occurs at the conductor surface: E_max = V / (r ln(R/r)) = 6600/(0.008 × 0.6931) = 1.190 × 10⁶ V/m = 1.190 MV/m rms, taking 6600 V as conductor-to-sheath voltage. If peak instantaneous stress is required, it is √2 × 1.190 = 1.68 MV/m.

What "Solve" is asking you to do

Choose the method, then carry it through to a final answer. Identifying what kind of problem this is and why that method applies is the first thing marked; a correct figure arrived at invisibly earns almost nothing.

Structure that answers it

Given data and what is required → method chosen, with the reason it applies → set-up (equation, circuit, free body, trial balance) → working, step by step → answer with units and any condition of validity

Where marks are lost

Doing the middle steps mentally and writing only the result. In mathematics papers, a further loss comes from giving a decimal where the exact value in surds or fractions was wanted, or from skipping the justification a part explicitly asks for.

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How this answer will be evaluated

Approach

(a) explain: definition/context > points in order > small example > short close | (b(i)) compare: paired headings or table > key differences > significance > conclusion | (b(ii)) discuss: intro > 3-4 dimensions > example > balanced close | (c) calculate: given > formula > substitution > result with units > interpretation Full marks: Complete derivations, correct calculations, clear diagrams, and accurate explanations for all parts.

Key points expected

  • Derive state equations (A, B matrices) from block diagram
  • Derive output equation (C, D matrices)
  • Calculate controllability matrix and check rank
  • Calculate observability matrix and check rank
  • Define full decoding (all address lines used)
  • Define partial decoding (subset of address lines used)
  • List advantages of full decoding
  • List advantages of partial decoding

Evaluation rubric

Each sub-part is marked on its own, against the marks and word limit printed on the paper.

  1. (a) State-space model and controllability/observability check for the given block diagram. 20 marks

    explain— definition/context → points in order → small example → short close

    Must cover

    • Derive state equations (A, B matrices) from block diagram
    • Derive output equation (C, D matrices)
    • Calculate controllability matrix and check rank
    • Calculate observability matrix and check rank

    Loses marks

    • Sign errors in feedback loops
    • Missing state or output equation

    Earns more

    • Correct identification of state variables x1, x2
    • Explicit calculation of determinants for rank check

    Extra mark

    • Redrawn signal flow graph with clear node labels
  2. (b(i)) Differentiate full vs partial decoding for 8085 with pros and cons. 10 marks

    compare— paired headings or table → key differences → significance → conclusion

    Must cover

    • Define full decoding (all address lines used)
    • Define partial decoding (subset of address lines used)
    • List advantages of full decoding
    • List advantages of partial decoding

    Loses marks

    • Confusing address lines with data lines
    • Missing advantages/disadvantages

    Earns more

    • Mention of address aliasing in partial decoding
    • Circuit complexity comparison

    Extra mark

    • Schematic diagram of decoder logic
  3. (b(ii)) Explain BCD addition using DAA instruction with a worked example. 10 marks

    discuss— intro → 3-4 dimensions → example → balanced close

    Must cover

    • Explain the purpose of DAA (Decimal Adjust Accumulator)
    • Provide a specific BCD addition example (e.g., 0x9 + 0x5)
    • Show the binary addition result before DAA
    • Show the final BCD result after DAA

    Loses marks

    • Incorrect final BCD value
    • No example provided

    Earns more

    • Explanation of carry flag handling
    • Mention of auxiliary carry

    Extra mark

    • Assembly code snippet for the operation
  4. (c) Compute insulation resistance, capacitance, and max electric stress for the cable. 10 marks

    calculate— given → formula → substitution → result with units → interpretation

    Must cover

    • Calculate insulation resistance using given resistivity and dimensions
    • Calculate capacitance using given permittivity and dimensions
    • Calculate maximum electric stress (voltage gradient)
    • Show formulas used for each calculation

    Loses marks

    • Unit errors in final answers
    • Missing any of the three required calculations

    Earns more

    • Correct unit conversion (cm to m, km to m)
    • Step-by-step substitution of values

    Extra mark

    • Diagram of cable cross-section with dimensions

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