Electrical Engineering 2023 Paper II 50 marks Solve

Q6

(a) (i) A power system has two generators with the following cost curves : Generator 1 : C₁(P_g1) = 0.008 P_g1² + 8 P_g1 + 380 (thousand rupees/hour) Generator 2 : C₂(P_g2) = 0.009 P_g2² + 7 P_g2 + 430 (thousand rupees/hour) The generator limits are 120 MW ≤ P_g1 ≤ 680 MW 60 MW ≤ P_g2 ≤ 550 MW A load demand of 650 MW is supplied by the generators in an optimal manner. Determine the optimal generation of each generator, neglecting losses in the transmission network. 10 marks (ii) A three-bus network is shown in the figure below, indicating the p.u. impedance of each element : Find the bus admittance matrix, Ybus, of the network. 10 marks (b) (i) Write the steps involved in DMA data transfer. Also describe the functions of 8085 pins which are used in DMA data transfer. 12 marks (ii) Write an 8085 assembly language program to read and complement the contents of the flag register. 8 marks (c) Find the value of R so that the system shown in the figure is critically damped. V_i(t) is the input voltage and output V_o(t) is the voltage across the capacitance. L = 90 μH, C = 120 nF : 10 marks

हिंदी में प्रश्न पढ़ें

(a) (i) एक शक्ति तंत्र में दो जनित्रों (जनरेटर्स) के लागत वक्र निम्नलिखित हैं : जनित्र 1 : C₁(P_g1) = 0.008 P_g1² + 8 P_g1 + 380 (हजार रुपये प्रति घंटा) जनित्र 2 : C₂(P_g2) = 0.009 P_g2² + 7 P_g2 + 430 (हजार रुपये प्रति घंटा) जनित्रों की सीमाएँ हैं 120 MW ≤ P_g1 ≤ 680 MW 60 MW ≤ P_g2 ≤ 550 MW जनित्रों द्वारा एक 650 MW भार की माँग इष्टतम तरीके से प्रदान की जाती है। संचरण संजाल की हानि (हास) को नगण्य मानते हुए, प्रत्येक जनित्र का इष्टतम उत्पादन ज्ञात कीजिए। 10 अंक (ii) एक त्रि-बस संजाल को नीचे चित्र में दर्शाया गया है, जिसमें प्रत्येक अवयव की p.u. प्रतिबाधा दी गई है : संजाल की बस प्रवेश्यता मैट्रिक्स, Yबस, प्राप्त कीजिए। 10 अंक (b) (i) डी० एम० ए० डाटा स्थानांतरण में निहित क्रमों को लिखिए। 8085 सूक्ष्म-संसाधित्र की उन पिनों के कार्यों का भी वर्णन कीजिए, जो डी० एम० ए० डाटा स्थानांतरण में उपयोग की जाती हैं। 12 अंक (ii) 8085 का एक संयोजन भाषा प्रोग्राम लिखिए, जो कि फ्लैग पंजी (रजिस्टर) की अंतर्वस्तुओं (कांटेंट्स) को पढ़ता है एवं उनका पूरक होता है। 8 अंक (c) प्रतिरोध R का वह मान प्राप्त कीजिए, जिससे कि नीचे चित्र में दर्शाया गया तंत्र क्रांतिकतः अवमंदित हो जाए। Vi(t) निवेश बोल्टता एवं निर्गत Vo(t) संधारित्र के आर-पार बोल्टता है। L = 90 µH, C = 120 nF : 10 अंक

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How this answer will be evaluated

Approach

This is a multi-part problem-solving question requiring systematic calculation and derivation across power systems, microprocessors, and control systems. Allocate approximately 20 minutes (40%) to part (a) covering economic load dispatch and Ybus formation, 15 minutes (30%) to part (b) on DMA operations and 8085 assembly programming, and 10 minutes (20%) to part (c) for critical damping calculation. Begin each sub-part with the governing equation, show complete step-by-step working, and verify boundary conditions and physical feasibility of results.

Key points expected

  • For (a)(i): Apply equal incremental cost criterion (dC₁/dP_g1 = dC₂/dP_g2 = λ) with P_g1 + P_g2 = 650 MW, check generator limits, and resolve if limits violated
  • For (a)(ii): Convert impedances to admittances (y = 1/z), identify bus connections, and construct Ybus matrix with diagonal elements as sum of connected admittances and off-diagonals as negative of connecting branch admittances
  • For (b)(i): Describe HOLD, HLDA, RESET, and address/data bus pins; explain DMA handshake sequence: peripheral requests → CPU grants hold → DMA controller takes bus → transfer → release
  • For (b)(ii): Use PUSH PSW to save flags on stack, POP into register pair, complement accumulator, then restore; or use direct flag manipulation via alternate register operations
  • For (c): Derive second-order characteristic equation from RLC circuit, set damping ratio ζ = 1 for critical damping, solve for R = 2√(L/C) with proper unit conversion from μH and nF to ohms
  • Cross-check: Verify (a)(i) solution satisfies both power balance and generator limits; confirm (c) result yields repeated real poles

Evaluation rubric

DimensionWeightMax marksExcellentAveragePoor
Concept correctness20%10Correctly applies economic dispatch lambda iteration, Ybus formation rules, 8085 DMA protocol with proper pin functions, and RLC critical damping condition; recognizes when generator limits bind in (a)(i)Identifies basic formulas but misapplies limit checking in dispatch or confuses self/mutual admittances in Ybus; describes DMA steps without clear pin-function mappingUses incorrect optimization criterion (e.g., average cost), treats impedances as admittances directly, or applies wrong damping condition (under/over-damped formulas)
Numerical accuracy20%10Precise calculations: λ = 9.2 Rs/MWh, P_g1 = 350 MW, P_g2 = 300 MW for (a)(i); correct Ybus values in per-unit; R = 54.77 Ω or 1732 Ω depending on circuit topology for (c); proper unit conversionsCorrect method but arithmetic errors in quadratic solution or matrix elements; order-of-magnitude correct for R but calculation slips in L/C ratioMajor calculation errors: incorrect lambda, power imbalance, wrong diagonal/off-diagonal Ybus entries, or R value off by 10x due to unit confusion
Diagram quality15%7.5Clear three-bus network diagram with labeled impedances for (a)(ii); 8085 pin diagram showing HOLD/HLDA/RESET for (b)(i); RLC circuit with proper node labeling for (c); neat, labeled, and referenced in solutionRough sketches with missing labels or incomplete bus numbering; pin diagram without clear indication of DMA-specific pins; circuit drawn but values not markedMissing diagrams where essential, or unrecognizable schematics; no attempt to illustrate network topology or DMA handshake timing
Step-by-step derivation25%12.5Explicit derivation: dC/dP equations → lambda solution → limit check → readjustment if needed; admittance calculation → Ybus element construction; DMA state sequence; characteristic equation → ζ=1 condition; assembly program with commentsShows main equations but skips intermediate algebra; Ybus written without showing y-calculations; DMA steps listed without sequence logic; program lacks comments or stack operation detailJumps to final answers without derivation; Ybus claimed without basis; DMA described vaguely; no derivation of damping condition; assembly code incorrect or missing
Practical interpretation20%10Interprets economic dispatch result in context of Indian grid merit order; explains why Ybus is sparse and preferred for computer analysis; relates DMA to high-speed data acquisition in SCADA; discusses critical damping for power supply transient responseBrief mention of practical relevance without elaboration; generic statements about efficiency or speed without system contextPurely mathematical treatment with no connection to real power systems, microprocessor applications, or control system design practice

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