Paper I — Q1
(a) In the circuit given below, find the voltages at point A and point B. 10 marks (b) Determine the time domain signal x(t)…
In the circuit given below, find the voltages at point A and point B. 10 marks
Determine the time domain signal x(t) corresponding to the DTFT given below : 10 marks
Draw the output voltage waveform of the circuit given below for 5 V, 50 Hz ac rms input. Forward voltage drop in diode D₁ is 0·6 V. 10 marks
Design a sequential circuit with two D flip flops A and B and one input X. Let the state of the circuit remain the same for X = 0. However, when X = 1, the circuit goes through the state transitions from 00 to 10 to 11 to 01, back to 00 and then repeats. 10 marks
Calculate Z-parameters for the two-port network given in the circuit diagram. 10 marks
हिंदी में प्रश्न पढ़ें
नीचे दिए गए परिपथ में, बिंदु A तथा बिंदु B पर वोल्टता ज्ञात कीजिए। 10
नीचे दिए गए DTFT के संगत समय-प्रक्षेत्र (डोमेन) संकेत x(t) को ज्ञात कीजिए। 10
5 V, 50 Hz ac rms निवेश के लिए नीचे दिए गए परिपथ का निर्गत वोल्टता तरंगरूप खींचिए। डायोड D₁ में अग्र वोल्टता अवपात 0·6 V है। 10
दो D फ्लिप-फ्लॉपों A एवं B के साथ एक X निवेश वाला एक अनुक्रमिक परिपथ अभिकल्पित कीजिए। मान लीजिए कि X = 0 के लिए परिपथ अपरिवर्तित रहता है। तथापि जब X = 1 हो, तो परिपथ 00 से 10 से 11 से 01, पुनः 00 अवस्था संक्रमणों से गुजरता है तथा फिर यही दोहराता है। 10
परिपथ आरेख में दिए गए द्वि-पोर्ट जालक्रम के लिए Z-प्राचलों की गणना कीजिए। 10
The figure this question refers to, in words
The question paper is a scan and the diagram did not survive as text. This is the figure as read from the original page — every component, value and label — so the question can be worked from the text below.
(a) Circuit with nodes A, B, and G. Node G is grounded. A 3 A current source points left, connected between the node between the 12 ohm and 6 ohm resistors and node B. A 12 ohm resistor connects node A to the node between the 12 ohm and 6 ohm resistors. A 6 ohm resistor connects the node between the 12 ohm and 6 ohm resistors to node B. A 9 ohm resistor connects node A to node B. A 6 V voltage source with positive terminal at node A connects node A to a node; a 3 ohm resistor connects this node to node G. A 4 ohm resistor connects node B to a node; a 12 V voltage source with positive terminal at node G connects this node to node G. A 6 ohm resistor connects the node between the 6 V source and 3 ohm resistor to node G. Find the voltages at point A and point B.
(b) Two-panel DTFT plot. Top panel: magnitude |X(e^jΩ)| versus Ω. Vertical axis labelled |X(e^jΩ)| with value 1 marked. Horizontal axis labelled Ω with ticks at -3π, -5π/2, -2π, -3π/2, -π, -π/2, 0, π/2, π, 3π/2, 2π, 5π/2, 3π. The curve is labelled sin(Ω) and consists of repeated arch-like segments: from -5π/2 to -3π/2 a positive arch peaking at 1, from -3π/2 to -π/2 a negative arch, from -π/2 to π/2 a positive arch peaking at 1, from π/2 to 3π/2 a negative arch, from 3π/2 to 5π/2 a positive arch peaking at 1. Dashed horizontal lines extend at the level of the peaks. Bottom panel: phase arg[X(e^jΩ)] versus Ω. Vertical axis labelled arg[X(e^jΩ)] with ticks at -2π and 2π. Horizontal axis labelled Ω with ticks at -3π, -2π, -π, 0, π, 2π, 3π. The plot shows straight line segments of slope +1 passing through the origin and repeating every 2π, with dashed horizontal lines at ±2π.
(c) Circuit diagram: A capacitor C1 of 100 microfarad is connected between the INPUT terminal and a node. The positive terminal of C1 is on the right side. From this node, a resistor R1 of 10 kilohm connects to the common bottom line. Also from this node, a branch goes to the OUTPUT terminal. In parallel with R1, there is a diode D1 in series with a 3 V DC voltage source. The diode D1 has its anode connected to the node and its cathode connected to the positive terminal of the 3 V source. The negative terminal of the 3 V source connects to the common bottom line. The INPUT is a 5 V, 50 Hz AC rms signal. The forward voltage drop of diode D1 is 0.6 V. The task is to draw the output voltage waveform.
(e) Two-port network inside a dashed rectangle. Left port: terminals marked + and - with voltage V1 across them; current I1 enters the top-left + terminal and leaves the bottom-left - terminal. Right port: terminals marked + and - with voltage V2 across them; current I2 enters the top-right + terminal and leaves the bottom-right - terminal. Inside: a 3 ohm resistor connects the top-left node to the top-right node. From the top-left node, a 3 ohm resistor goes down to a middle node. From the top-right node, a 3 ohm resistor goes down to the same middle node. From the middle node, a 3 ohm resistor goes down to the bottom common line connecting the two - terminals. Asked: Z-parameters of the two-port network.
Model answer
Written by UPSC Answer Check against this question's marking rubric, to the expected length. UPSC does not publish answers for Mains — this is one way to score well, not an official key.
(a) Let the node between the 12 Ω and 6 Ω resistors be C. Define node voltages V_A = a, V_B = b, V_C = c, with ground G at 0 V. The 3 A current source points left, so it injects current into C and draws current from B.
Applying Kirchhoff’s current law (KCL) at node A: (a − c)/12 + (a − b)/9 + (a − 6)/2 = 0. Multiply by 36: 3(a − c) + 4(a − b) + 18(a − 6) = 0 ⇒ 25a − 4b − 3c = 108. … (1)
KCL at node B: (b − c)/6 + (b − a)/9 + (b + 12)/4 + 3 = 0. Multiply by 36: 6(b − c) + 4(b − a) + 9(b + 12) + 108 = 0 ⇒ −4a + 19b − 6c = −216 ⇒ 4a − 19b + 6c = 216. … (2)
KCL at node C: (c − a)/12 + (c − b)/6 − 3 = 0. Multiply by 12: (c − a) + 2(c − b) − 36 = 0 ⇒ −a − 2b + 3c = 36. … (3)
From (3): 3c = a + 2b + 36. Substitute in (1): 25a − 4b − (a + 2b + 36) = 108 ⇒ 24a − 6b = 144 ⇒ 4a − b = 24 ⇒ b = 4a − 24. … (4)
Substitute 3c in (2): 4a − 19b + 2(a + 2b + 36) = 216 ⇒ 6a − 15b = 144 ⇒ 2a − 5b = 48. … (5)
Put (4) into (5): 2a − 5(4a − 24) = 48 ⇒ 2a − 20a + 120 = 48 ⇒ −18a = −72 ⇒ a = 4 V.
Then b = 4(4) − 24 = −8 V. Also c = (4 + 2(−8) + 36)/3 = (4 − 16 + 36)/3 = 24/3 = 8 V.
Final answer (a): V_A = 4 V, V_B = −8 V.
(b) The upper trace is the real part of X(e^jΩ), which is cos Ω, and the lower trace gives arg[X(e^jΩ)] = Ω. Hence the DTFT is X(e^jΩ) = exp(jΩ).
By the inverse DTFT definition: x[n] = (1/2π) ∫_−π^π X(e^jΩ) exp(jΩn) dΩ = (1/2π) ∫_−π^π exp(jΩ) exp(jΩn) dΩ = (1/2π) ∫_−π^π exp[jΩ(n + 1)] dΩ.
The integral equals 2π when n + 1 = 0, i.e. n = −1, and equals zero for all other integers n. Therefore x[n] = δ[n + 1]. In sequence form, x[n] = 1 for n = −1 and 0 elsewhere.
Final answer (b): x[n] = δ[n + 1].
(c) The input is 5 V rms, 50 Hz. Its peak value is V_m = 5√2 = 7.071 V. The diode D₁ conducts only when its anode voltage exceeds the series battery voltage plus its forward drop: clamp level = 3 V + 0.6 V = 3.6 V. In steady state the coupling capacitor C₁ charges to V_C = V_m − 3.6 = 7.071 − 3.6 = 3.471 V. The output voltage is therefore v_o(t) = v_in(t) − V_C = 7.071 sin(100πt) − 3.471 V. Thus the output has:
- positive peak = +3.6 V at t = 5 ms + n×20 ms,
- negative peak = −7.071 − 3.471 = −10.542 V at t = 15 ms + n×20 ms,
- time period T = 1/50 = 20 ms. Since R₁C₁ = 10 kΩ × 100 μF = 1 s, which is much larger than 20 ms, the capacitor voltage remains almost constant and droop is negligible. The waveform to be drawn is a sine wave shifted down by 3.471 V, with its positive peaks clamped at +3.6 V and negative peaks reaching about −10.54 V.
Final answer (c): v_o(t) = 7.071 sin(100πt) − 3.471 V, with maximum +3.6 V and minimum −10.54 V.
(d) Let the present state be A B. For X = 0 the state remains unchanged, so A⁺ = A and B⁺ = B. For X = 1 the required sequence is 00 → 10 → 11 → 01 → 00. The state table is:
- A B X = 0 0 0 → A⁺B⁺ = 0 0
- A B X = 0 0 1 → A⁺B⁺ = 1 0
- A B X = 0 1 0 → A⁺B⁺ = 0 1
- A B X = 0 1 1 → A⁺B⁺ = 0 0
- A B X = 1 0 0 → A⁺B⁺ = 1 0
- A B X = 1 0 1 → A⁺B⁺ = 1 1
- A B X = 1 1 0 → A⁺B⁺ = 1 1
- A B X = 1 1 1 → A⁺B⁺ = 0 1
For D flip-flops, D_A = A⁺ and D_B = B⁺. From the table, when X = 0, D_A = A and D_B = B. When X = 1:
- A⁺ = B′ (since 00→10 gives A⁺=1, B=0; 10→11 gives A⁺=1, B=0; 11→01 gives A⁺=0, B=1; 01→00 gives A⁺=0, B=1)
- B⁺ = A (since 00→10 gives B⁺=0, A=0; 10→11 gives B⁺=1, A=1; 11→01 gives B⁺=1, A=1; 01→00 gives B⁺=0, A=0)
Hence the next-state equations are D_A = X′ A + X B′, D_B = X′ B + X A.
Circuit design: Use two D flip-flops A and B with a common clock. For D_A, use a 2-to-1 multiplexer with select input X: input 0 is connected to A, input 1 to B′ (through an inverter on B). For D_B, use another 2-to-1 multiplexer with select X: input 0 connected to B, input 1 connected to A. The multiplexer outputs drive the D inputs of flip-flops A and B respectively.
Final answer (d): D_A = X′A + XB′, D_B = X′B + XA.
(e) For a two-port network, V₁ = Z₁₁ I₁ + Z₁₂ I₂ and V₂ = Z₂₁ I₁ + Z₂₂ I₂. Set I₂ = 0 (port 2 open-circuited). Let the top-left node be 1, top-right node be 2, and the middle node be M. Ground is 0 V.
KCL at node 2: (V₂ − V₁)/3 + (V₂ − V_M)/3 = 0 ⇒ 2V₂ − V₁ − V_M = 0 ⇒ V_M = 2V₂ − V₁. … (1)
KCL at node M: (V_M − V₁)/3 + (V_M − V₂)/3 + V_M/3 = 0 ⇒ 3V_M − V₁ − V₂ = 0 ⇒ 3V_M = V₁ + V₂. … (2)
Substitute (1) into (2): 3(2V₂ − V₁) = V₁ + V₂ ⇒ 6V₂ − 3V₁ = V₁ + V₂ ⇒ 5V₂ = 4V₁ ⇒ V₂ = (4/5)V₁. Then V_M = 2(4/5 V₁) − V₁ = (8/5 − 1)V₁ = (3/5)V₁.
Now I₁ is the sum of currents leaving node 1: I₁ = (V₁ − V₂)/3 + (V₁ − V_M)/3 = [2V₁ − V₂ − V_M]/3 = [2V₁ − (4/5)V₁ − (3/5)V₁]/3 = [(10/5 − 7/5)V₁]/3 = (3/5 V₁)/3 = V₁/5.
Therefore: Z₁₁ = V₁/I₁ = 5 Ω, Z₂₁ = V₂/I₁ = (4/5 V₁)/(V₁/5) = 4 Ω.
By symmetry (the network is reciprocal and symmetric): Z₂₂ = 5 Ω, Z₁₂ = 4 Ω.
Final answer (e): Z₁₁ = 5 Ω, Z₁₂ = 4 Ω, Z₂₁ = 4 Ω, Z₂₂ = 5 Ω. In matrix form: Z = [ [5 Ω, 4 Ω], [4 Ω, 5 Ω] ].
What "Solve" is asking you to do
Choose the method, then carry it through to a final answer. Identifying what kind of problem this is and why that method applies is the first thing marked; a correct figure arrived at invisibly earns almost nothing.
Structure that answers it
Given data and what is required → method chosen, with the reason it applies → set-up (equation, circuit, free body, trial balance) → working, step by step → answer with units and any condition of validity
Where marks are lost
Doing the middle steps mentally and writing only the result. In mathematics papers, a further loss comes from giving a decimal where the exact value in surds or fractions was wanted, or from skipping the justification a part explicitly asks for.
How this answer will be evaluated
Approach
(a) calculate: given > formula > substitution > result with units > interpretation | (b) calculate: given > formula > substitution > result with units > interpretation | (c) describe: define > structure or process in order > labelled diagram > significance | (d) describe: define > structure or process in order > labelled diagram > significance | (e) calculate: given > formula > substitution > result with units > interpretation Full marks: All parts solved with correct method, clear diagrams, and verified results.
Key points expected
- Redraw circuit with node labels and ground reference
- Apply KCL or nodal analysis at nodes A and B
- Account for 3A current source direction and 6V/12V sources
- State final values with units (Volts)
- Identify periodicity and fundamental frequency from DTFT plot
- Use inverse DTFT integral or Fourier series coefficients
- Interpret magnitude |X(e^jΩ)| and phase arg[X(e^jΩ)] correctly
- Express x(t) as a real-valued time function
Evaluation rubric
Each sub-part is marked on its own, against the marks and word limit printed on the paper.
- (a) Numerical values for voltages at nodes A and B. 10 marks
calculate— given → formula → substitution → result with units → interpretation
Must cover
- Redraw circuit with node labels and ground reference
- Apply KCL or nodal analysis at nodes A and B
- Account for 3A current source direction and 6V/12V sources
- State final values with units (Volts)
Loses marks
- Sign errors in voltage source polarities
- Ignoring the 3A current source contribution
Earns more
- Correctly identifies parallel/series resistor combinations
- Uses superposition or mesh analysis as alternative method
Extra mark
- Verifies result using power balance or KVL loop check
- (b) Time-domain expression x(t) from the given DTFT magnitude and phase. 10 marks
calculate— given → formula → substitution → result with units → interpretation
Must cover
- Identify periodicity and fundamental frequency from DTFT plot
- Use inverse DTFT integral or Fourier series coefficients
- Interpret magnitude |X(e^jΩ)| and phase arg[X(e^jΩ)] correctly
- Express x(t) as a real-valued time function
Loses marks
- Confusing DTFT with DFT or CTFT
- Ignoring phase information in reconstruction
Earns more
- Recognizes symmetry (even/odd) to simplify integration
- Correctly handles discontinuities or jumps in phase plot
Extra mark
- Sketches the resulting time-domain waveform for verification
- (c) Output voltage waveform for 5V, 50Hz AC input with diode drop. 10 marks
describe— define → structure or process in order → labelled diagram → significance
Must cover
- Identify circuit as a clamper or peak detector with bias
- Calculate peak input voltage (5√2 ≈ 7.07V)
- Determine diode conduction threshold (3V + 0.6V = 3.6V)
- Sketch output waveform showing clamped level and ripple
Loses marks
- Ignoring diode forward voltage drop (0.6V)
- Drawing output as pure DC without AC component
Earns more
- Calculates time constant τ = R₁C₁ to assess ripple magnitude
- Labels positive and negative half-cycles on waveform
Extra mark
- Quantifies peak-to-peak ripple voltage using exponential decay
- (d) Sequential circuit design with state transitions for X=1. 10 marks
describe— define → structure or process in order → labelled diagram → significance
Must cover
- Construct state diagram: 00→10→11→01→00 for X=1
- Derive excitation equations for D flip-flops A and B
- Show logic circuit or Boolean expressions for D_A and D_B
- Verify state holds for X=0 (no transition)
Loses marks
- Incorrect state sequence (e.g., 00→01→11→10)
- Failing to hold state when X=0
Earns more
- Uses K-maps to minimize excitation equations
- Includes clock and reset considerations in design
Extra mark
- Provides timing diagram showing state changes on clock edges
- (e) Z-parameters (Z11, Z12, Z21, Z22) for the two-port network. 10 marks
calculate— given → formula → substitution → result with units → interpretation
Must cover
- Apply definition: Z11 = V1/I1 with I2=0, etc.
- Solve circuit for each parameter using KCL/KVL
- Express Z-parameters in terms of given 3Ω resistors
- Present results as a 2x2 matrix
Loses marks
- Incorrect open-circuit or short-circuit conditions
- Arithmetic errors in resistor combinations
Earns more
- Uses symmetry or reciprocity to reduce calculations
- Verifies Z12 = Z21 for reciprocal network
Extra mark
- Converts to Y-parameters or ABCD-parameters for comparison
Practice this exact question
Write your answer and it is marked point by point against the model answer above — what you covered, what you missed, what you got wrong.
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