Electrical Engineering

UPSC Electrical Engineering 2025

All 16 questions from the 2025 Civil Services Mains Electrical Engineering paper across 2 papers — 800 marks in total. Each question comes with a detailed evaluation rubric, directive word analysis, and model answer points.

16Questions
800Total marks
2Papers
2025Exam year

Paper I

8 questions · 400 marks
Q1
50M Compulsory solve Circuit analysis, signals and systems, electronics

(a) In the circuit given below, find the voltages at point A and point B. 10 marks (b) Determine the time domain signal x(t) corresponding to the DTFT given below : 10 marks (c) Draw the output voltage waveform of the circuit given below for 5 V, 50 Hz ac rms input. Forward voltage drop in diode D₁ is 0·6 V. 10 marks (d) Design a sequential circuit with two D flip flops A and B and one input X. Let the state of the circuit remain the same for X = 0. However, when X = 1, the circuit goes through the state transitions from 00 to 10 to 11 to 01, back to 00 and then repeats. 10 marks (e) Calculate Z-parameters for the two-port network given in the circuit diagram. 10 marks

Answer approach & key points

Solve all five sub-parts systematically, allocating approximately 20% time to each part since all carry equal marks. For (a), apply KCL/KVL or nodal analysis; for (b), use inverse DTFT properties; for (c), sketch the rectified waveform showing clipping at 0.6V; for (d), construct state table and derive D flip-flop excitation equations; for (e), use open-circuit impedance measurements. Present each solution with clear circuit diagrams, mathematical steps, and final boxed answers.

  • Part (a): Correct application of nodal analysis or superposition theorem to find VA and VB with proper sign conventions
  • Part (b): Accurate inverse DTFT calculation using synthesis equation or standard transform pairs, with proper handling of periodicity
  • Part (c): Correct peak voltage calculation (5√2 V), identification of conduction angle, and waveform showing 0.6V offset during positive half-cycles
  • Part (d): Complete state diagram, state table, excitation table for D flip-flops, and minimized Boolean expressions for DA and DB
  • Part (e): Correct application of Z-parameter definitions (z11=V1/I1 at I2=0, etc.) with proper mesh or nodal analysis of the two-port network
  • All parts: Proper unit handling (volts, ohms, seconds, Hz) and significant figures appropriate for engineering calculations
  • Diagrams: Clear labeling of components, nodes, reference directions, and waveform axes with time/voltage scales
  • Sequential design: Verification that the designed circuit returns to state 00 after 01 when X=1, maintaining self-starting property
Q2
50M solve RC circuits, op-amp oscillators, Z-transform

(a) In the circuit shown in the diagram, initially key K₁ is closed and capacitor has no charge (at time t = 0). Now at time t = 10 seconds, key K₁ is opened and at t = 18·68 seconds it is again closed. Plot output voltage across the capacitor with respect to time and find output voltage values at time 10 seconds, 18·68 seconds and 28·68 seconds. 20 marks (b) Consider the circuit of an operational amplifier given here in which Zener diodes Z₁ and Z₂ are having reverse breakdown voltage = 7·4 V and forward voltage drop = 0·6 V. (i) Draw the output voltage waveform showing voltage value with time and calculate frequency of output waveform. (ii) Modify the circuit for duty cycle factor D = 0·25 by replacing R₁ from combination of suitable resistances and diodes, so that output frequency is not changed. 20 marks (c) Determine the causal signal x[n] if its z-transform X(z) is specified by a pole-zero pattern shown in the figure below. Take the constant G = 1/4. 10 marks

Answer approach & key points

Solve this multi-part numerical problem by first analyzing the RC transient circuit in (a) with proper time-constant calculations for charging/discharging phases, then analyze the op-amp astable multivibrator in (b)(i)-(ii) for frequency and duty cycle modification, and finally perform inverse Z-transform for (c). Allocate approximately 40% time to part (a) given its 20 marks and complex multi-interval analysis, 40% to part (b) covering both frequency calculation and circuit redesign, and 20% to part (c) for the pole-zero inversion. Present each part with clear sectional headings, state assumptions explicitly, show all formulae before substitution, and conclude with verified numerical answers.

  • Part (a): Correct application of RC charging equation Vc = V(1-e^(-t/RC)) for 0-10s, discharging equation Vc = V₀e^(-t/RC) for 10-18.68s, and recharging from 18.68s with appropriate initial conditions; identification that 18.68s equals one time constant for discharge
  • Part (b)(i): Recognition of op-amp as astable multivibrator with Zener clamping; correct calculation of threshold voltages using Zener breakdown (7.4V) and forward drop (0.6V); derivation of frequency formula f = 1/(2R₁C₁ln((1+β)/(1-β))) or simplified form with β = R₂/(R₁+R₂)
  • Part (b)(ii): Design of asymmetric timing circuit using parallel branches with diodes to create different charging/discharging resistances while maintaining same total period; selection of resistor values to achieve D = 0.25 (25% duty cycle) with ton = T/4 and toff = 3T/4
  • Part (c): Identification of poles and zeros from given pattern; construction of X(z) = G·(z-z₁)(z-z₂).../((z-p₁)(z-p₂)...); partial fraction expansion and inverse Z-transform using standard pairs; causal sequence verification through ROC analysis (outside outermost pole)
  • Cross-cutting: Proper unit handling, significant figures consistent with given data (2 decimal places for time values), and physical verification of results (e.g., capacitor voltage cannot exceed supply, frequency in practical audio/radio range)
Q3
50M solve Boolean functions, transistor amplifiers, LTI systems

(a) Consider the Boolean function: F(A, B, C, D) = Σ m (1, 3, 4, 11, 12, 13, 14, 15). Implement it with a 4-to-1 multiplexer and external gates. Connect inputs A and B to the selection lines. Input to the four data lines is a function of the variables C and D which are obtained by expressing F as a function of C and D for each of the four cases when AB = 00, 01, 10 and 11. Functions are to be implemented with external gates. (20 marks) (b) In the circuit given below, transistors T₁ and T₂ are having V_BE = 0.6 V and β = 499. (i) Calculate small signal ac voltage gain of the amplifier at 20 Hz and 2 kHz. (ii) Find dc voltages on collectors of transistors T₁ and T₂ respectively. (20 marks) (c) Impulse response of an LTI system, h(n) is defined in the interval N₀ ≤ n ≤ N₁. If the input x(n) to the LTI system is zero except in the interval N₂ ≤ n ≤ N₃, find the interval for which the output y(n) exists in forms of N₀, N₁, N₂ and N₃. (10 marks)

Answer approach & key points

Solve this multi-part problem by allocating time proportionally to marks: approximately 40% on part (a) multiplexer design, 40% on part (b) transistor amplifier analysis, and 20% on part (c) LTI system interval calculation. Begin with clear K-map derivation for (a), proceed to complete DC and AC analysis for (b) including frequency-dependent gain calculations, and conclude with rigorous mathematical derivation of convolution intervals for (c).

  • For (a): Construct 4-variable K-map for F(A,B,C,D) = Σm(1,3,4,11,12,13,14,15), group minterms, and express F as function of C,D for each AB combination (00,01,10,11) to determine multiplexer data inputs
  • For (a): Draw 4-to-1 MUX with A,B as select lines and implement derived C,D functions using external AND/OR/NOT gates for each data input
  • For (b)(i): Calculate DC operating point (ICQ, VCEQ), then determine small-signal parameters (gm, rπ), and compute voltage gain at 20 Hz (considering coupling/bypass capacitor effects) and 2 kHz (mid-band)
  • For (b)(ii): Determine VC1 and VC2 using KVL analysis with given VBE = 0.6V and β = 499, accounting for transistor biasing network
  • For (c): Apply convolution sum property y(n) = x(n)*h(n) to derive output interval [N₀+N₂, N₁+N₃] with proper justification using support interval mathematics
Q4
50M solve Schottky transistor, Fourier transform, maximum power transfer

(a) For the Schottky transistor circuit shown below, determine I_B, I_D, I_C and V_CE. Next, remove the Schottky diode and determine I_B, I_D, I_C and V_CE assuming additional values of V_BE (sat.) = 0.8 V and V_CE (sat.) = 0.1 V. Assume parameter values of β = 50, V_BE (on) = 0.7 V and V_f = 0.3 V for the Schottky diode. (20 marks) (b) Find the Fourier transform of the following signals: (i) x(t) = [2sin(3πt)/πt] · [sin(2πt)/πt] (ii) x(t) = ∫_{-∞}^{t} [sin(2πt)/πt] dt Specify the properties used. (20 marks) (c) In the circuit shown below, V_s is the ac voltage source given by V_s = V_0 cos ωt, with V_0 = 14.14 V and ω = 300 rad/sec. Calculate the value of load resistance R_L for maximum power transfer and also find out maximum power transferred to load. k = 1, n = 0.2 (Turns Ratio) (10 marks)

Answer approach & key points

Solve this multi-part numerical problem by allocating approximately 40% of effort to part (a) Schottky transistor analysis (20 marks), 40% to part (b) Fourier transform computations (20 marks), and 20% to part (c) maximum power transfer (10 marks). Begin with clear circuit diagrams for parts (a) and (c), then proceed with systematic calculations showing all intermediate steps. For part (b), explicitly state each Fourier property used before applying it. Conclude each sub-part with boxed final answers and brief physical interpretations.

  • Part (a): Correct determination of I_B, I_D, I_C, V_CE with Schottky diode clamping (V_f = 0.3V), then recalculation without Schottky showing deep saturation (V_BE(sat)=0.8V, V_CE(sat)=0.1V)
  • Part (b)(i): Application of multiplication-convolution duality property to find FT of product of two sinc functions, yielding triangular convolution of rectangular pulses in frequency domain
  • Part (b)(ii): Use of time-integration property of FT (division by jω in frequency domain plus πδ(ω) term) applied to sinc function, recognizing integral of sinc as step response
  • Part (c): Calculation of reflected impedance through coupled inductors (k=1, n=0.2), determination of Thevenin equivalent seen by load, and application of conjugate matching for maximum power transfer at ω=300 rad/s
  • Explicit statement of Fourier properties used: multiplication-convolution duality for (b)(i), time-integration property for (b)(ii)
Q5
50M Compulsory solve Electromagnetics, transformers, power electronics, probability, communication systems

(a) As shown in the figure, just inside the surface of a dielectric slab, the electric field (E₁) is 15 V/m and it makes an angle of 30° with the surface. The electric field (E₂) makes 65.5° angle with the surface, just above the surface. Determine the magnitude of E₂ and the dielectric constant of the slab. (10 marks) (b) Show with the help of suitable derivations that the voltage regulation of a transformer varies with the power factor of the load. At what power factor will the voltage regulation be : (i) zero, and (ii) maximum ? (10 marks) (c) A single-phase Thyristor converter circuit as shown in the figure is feeding to a constant current load of 10 A. The supply voltage is of 230 V, 50 Hz and source inductance of 2 mH. Assume the Thyristors are ideal and triggering angle α = 30°. Calculate (i) the overlap angle u, and (ii) the drop in output voltage. (10 marks) (d) Show that for a binomial random variable, the mean is given by np and the variance is given by np (1 – p), where n gives the number of trials and p gives the probability of successes. (10 marks) (e) The frequency range of operation of a superheterodyne FM receiver is 88 MHz – 108 MHz. The centre frequency of the IF amplifier (f_IF) and the frequency of the local oscillator (f_LO) are so chosen that f_IF < f_LO. The design has to be so carried out that the image frequency f'_c falls outside of the 88 MHz – 108 MHz region. Determine the minimum required value of f_IF and the corresponding range of variations in f_LO for that chosen value of f_IF. (10 marks)

Answer approach & key points

This is a multi-part problem-solving question requiring equal attention to all five sub-parts (10 marks each). Begin with a brief introduction acknowledging the diverse topics covered. For part (a), apply boundary conditions for electric fields at dielectric interfaces. For part (b), derive the voltage regulation expression using transformer equivalent circuit. For part (c), analyze the single-phase converter with source inductance considering overlap. For part (d), prove mean and variance using binomial distribution properties. For part (e), apply superheterodyne receiver principles to determine IF and LO ranges. Allocate approximately equal time (~18-20 minutes) per sub-part, presenting each solution clearly with proper headings.

  • Part (a): Apply tangential E continuity (E₁sinθ₁ = E₂sinθ₂) and normal D continuity (ε₁E₁cosθ₁ = ε₂E₂cosθ₂) to find εᵣ = 3.0 and E₂ = 8.66 V/m
  • Part (b): Derive voltage regulation as %R = (I₂R₀₂cosφ ± I₂X₀₂sinφ)/V₂ × 100, showing zero regulation at leading pf = R₀₂/√(R₀₂²+X₀₂²) and maximum at lagging unity pf
  • Part (c): Calculate overlap angle u = 4.2° using cos(α+u) = cosα - (2ωLₛI₀)/Vₘ, and voltage drop ΔV₀ = (ωLₛI₀/π) = 2 V
  • Part (d): Prove E[X] = np using Σk·ⁿCₖpᵏqⁿ⁻ᵏ = np(p+q)ⁿ⁻¹ = np, and Var(X) = np(1-p) using E[X²] - (E[X])²
  • Part (e): Determine f_IF(min) = 10 MHz ensuring image frequency f'c = f_LO + f_IF = fc + 2f_IF > 108 MHz, giving LO range 98-118 MHz
Q6
50M solve DC machines, power electronics, communication systems

(a) (i) What is meant by armature reaction in DC machines ? Show with the help of developed view of armature conductors and poles that the effect of armature m.m.f. on the main field is entirely cross-magnetizing. (10 marks) (ii) A 10 kW, 220 V DC shunt motor draws a line current of 5 A while running at no-load speed of 1200 rpm. It has an armature resistance of 0·2 Ω and field resistance of 200 Ω. Determine the efficiency of the motor when it delivers rated load. (10 marks) (b) A converter circuit as shown in the figure is being used to charge a battery of voltage E = 24 V. The average charging current I_dc = 6 A, and supply voltage V_s = 60 V, 50 Hz. Determine (i) the value of limiting resistor 'R', and (ii) input power factor. (20 marks) (c) A DSB-SC amplitude-modulated signal with power spectral density as shown in figure (a) is corrupted with additive noise that has a power spectral density (N_0/2) within the passband region of the signal. The received signal-plus-noise is demodulated and low pass filtered as shown in figure (b). Determine the SNR at the output of the LPF. [BW : bandwidth] [Given : carrier signal = cos (2πf_c t)] (20 marks)

Answer approach & key points

Begin with a concise definition of armature reaction and its cross-magnetizing nature for part (a)(i), followed by systematic numerical solution for the DC motor efficiency in (a)(ii). For part (b), apply thyristor converter analysis to determine the firing angle, limiting resistor, and input power factor. For part (c), derive the output SNR for DSB-SC demodulation using coherent detection theory. Allocate approximately 15 minutes to (a)(i), 20 minutes to (a)(ii), 35 minutes to (b), and 35 minutes to (c), ensuring all diagrams are neatly drawn with proper labeling.

  • Definition of armature reaction as the effect of armature MMF on main field flux distribution in DC machines
  • Developed winding diagram showing armature conductors under N and S poles with current directions proving cross-magnetizing axis is perpendicular to main field axis
  • Calculation of no-load losses, field current, back EMF, and efficiency at rated load for the DC shunt motor
  • Determination of firing angle, average output voltage, and limiting resistor R for the battery charging converter circuit
  • Computation of input power factor considering displacement angle and distortion factor in the controlled rectifier
  • Expression for output SNR of DSB-SC system with coherent detection showing dependence on signal power spectral density and noise PSD
  • Integration of signal and noise power over the message bandwidth to obtain final SNR formula
  • Comparison of DSB-SC SNR improvement over conventional AM highlighting the 3 dB advantage due to suppressed carrier
Q7
50M solve Electromagnetic waves, induction motor, power factor correction, DC-DC converter

(a) It is given that $\vec{E} = E_m \sin (\omega t - \alpha z) \hat{a}_y$ in free space $\alpha > 0$. (i) Determine $\vec{D}$, $\vec{B}$ and $\vec{H}$. Plot $\vec{E}$ and $\vec{H}$ at $t = 0$. State clearly if any assumption is made. (ii) Show that these $\vec{E}$ and $\vec{H}$ fields constitute a wave travelling in the z-direction. Also demonstrate that the wave speed and E/H depend solely on the properties of free space. Given : $\mu_0 = 4\pi \times 10^{-7}$ H/m, and $\varepsilon_0 = \frac{1}{36\pi} \times 10^{-9}$ F/m. (b) (i) A 3-phase, 4-pole, 400 V, 10 kW, 50 Hz slip ring induction motor develops rated output at rated voltage and frequency with its slip ring short-circuited. The maximum torque equal to twice the full load torque, occurs at a slip of 12·5% with zero external resistance in rotor circuit. Neglect stator impedance, stator core and mechanical losses. Determine : I. slip and motor speed at full load torque, and II. starting current in terms of full load current. (10 marks) (ii) An industry has an average electrical load of 600 kW at a p.f. of 0·6 lagging. A synchronous motor with an efficiency of 90% is used to raise the combined p.f. to 0·9 lagging and at the same time supply a mechanical load of 100 kW. Calculate kVA capacity of the synchronous motor and synchronous motor operating power factor. (10 marks) (c) The buck-boost converter has an input voltage of $V_s = 12$ V. The duty cycle $D = 0·25$ and the switching frequency is 20 kHz. The inductance $L = 150$ μH and filter capacitor $C = 250$ μF. The average load current $I_0 = 1·25$ A. Determine : (i) the peak-to-peak ripple in the inductor current, and (ii) the critical values of inductor L and capacitor C for CCM. (10 marks)

Answer approach & key points

This is a multi-part numerical problem requiring systematic solution of electromagnetic wave propagation, induction motor characteristics, power factor correction, and DC-DC converter analysis. Allocate approximately 35% time to part (a) on EM waves (20 marks), 35% to part (b) on machines and power systems (20 marks), and 30% to part (c) on power electronics (10 marks). Begin each sub-part with stated assumptions, proceed with clear derivations, and conclude with numerical answers in proper units.

  • Part (a)(i): Correct application of constitutive relations D = ε₀E, B = μ₀H, and Maxwell's equations to derive B = (αEₘ/ω)cos(ωt-αz)âₓ and H = B/μ₀; proper sinusoidal plots of E and H at t=0 showing 90° spatial phase difference
  • Part (a)(ii): Demonstration that (ωt-αz) = constant implies phase velocity vₚ = ω/α = 1/√(μ₀ε₀) = c ≈ 3×10⁸ m/s; proof that |E|/|H| = √(μ₀/ε₀) = η₀ ≈ 377Ω (intrinsic impedance of free space)
  • Part (b)(i): Using torque-slip relation T ∝ sR₂/(R₂²+(sX₂)²), determination of full-load slip s_FL = 0.05 (5%) giving speed = 1425 rpm; starting current ratio I_st/I_FL = 2.5 using equivalent circuit with neglected stator impedance
  • Part (b)(ii): Calculation of reactive power compensation where original load has 800 kVAR lagging; synchronous motor must draw 260.4 kVAR leading to achieve 0.9 lagging combined p.f.; resulting motor kVA = 370.3 kVA at 0.27 leading p.f.
  • Part (c)(i): Application of buck-boost inductor current ripple formula ΔI_L = DV_s/(Lf) = 0.25×12/(150×10⁻⁶×20×10³) = 1 A peak-to-peak
  • Part (c)(ii): Critical inductance L_crit = D(1-D)²R/(2f) = 0.25×0.75²×9.6/(2×20×10³) = 33.75 μH; critical capacitance C_crit = (1-D)/(8Lf²×(ΔV₀/V₀)) for specified ripple criterion
Q8
50M derive Smith chart, wave reflection, AM modulation, inverter voltage control

(a) (i) Show that the Smith chart constructed for a lossless transmission line gives a family of r-circles, having a radius of $\frac{1}{(1+r)}$ for each circle which is centred at $\Gamma_r = \frac{r}{(1+r)}$ and $\Gamma_i = 0$. Here, $r$ = normalized resistance of the load impedance, $\Gamma_r$ and $\Gamma_i$ = real and imaginary parts of voltage reflection coefficient of the load impedance, respectively. (10 marks) (ii) In the figure given below, determine the amplitudes of the reflected and transmitted $\vec{E}$ and $\vec{H}$ at the interface, if $E_0^i = 1.2 \times 10^{-3}$ V/m in region 1, where $\varepsilon_{r_1} = 7.5$, $\mu_{r_1} = 1$ and $\sigma_1 = 0$. Given : Region 2 is a free space and assume normal incidence. Also, $\mu_0 = 4\pi \times 10^{-7}$ H/m and $\varepsilon_0 = \frac{1}{36\pi} \times 10^{-9}$ F/m. (10 marks) (b) A sinusoidal modulating signal m(t) of frequency $f_m$ produces an AM signal : $u(t) = A_c [1 + \beta \cos (2\pi f_m t)] \cos (2\pi f_c t)$, where $f_c$ is carrier frequency. Here, $f_c >> f_m$ and $\beta = 2$. This u(t) is applied to an ideal envelope detector which produces an output x(t). (i) Determine the Fourier series representation of x(t). (ii) Also determine the ratio of second harmonic amplitude to fundamental amplitude in x(t). (20 marks) (c) Discuss in brief various methods of voltage control within 3-phase inverters. (10 marks)

Answer approach & key points

Begin with the derivation-heavy sub-part (a)(i) by establishing the relationship between normalized impedance and reflection coefficient, then proceed to (a)(ii) for numerical computation of field amplitudes using boundary conditions. Allocate approximately 35% time to part (b) involving Fourier analysis of the AM envelope detector output, 20% to part (a), and 15% to part (c) on inverter voltage control methods. Ensure all derivations show intermediate steps and numerical answers include proper units.

  • Derivation of r-circle equation on Smith chart starting from Γ = (z_L - 1)/(z_L + 1) and showing algebraic manipulation to obtain circle equation with center at (r/(1+r), 0) and radius 1/(1+r)
  • Calculation of intrinsic impedances η₁ = √(μ₀μᵣ₁/ε₀εᵣ₁) and η₂ = √(μ₀/ε₀), then reflection coefficient Γ = (η₂ - η₁)/(η₂ + η₁) and transmission coefficient τ = 1 + Γ for normal incidence
  • Computation of reflected E and H amplitudes: E₀ʳ = ΓE₀ⁱ, H₀ʳ = -ΓE₀ⁱ/η₁ and transmitted E and H amplitudes: E₀ᵗ = τE₀ⁱ, H₀ᵗ = τE₀ⁱ/η₂ with correct numerical values
  • Fourier series representation of envelope detector output x(t) = |A_c[1 + 2cos(2πf_m t)]| showing handling of negative envelope when β > 1, resulting in rectified waveform with DC, fundamental and harmonic components
  • Calculation of second harmonic to fundamental amplitude ratio using Fourier coefficients of the periodic rectified cosine waveform, recognizing the waveform becomes periodic with period 1/f_m
  • Discussion of voltage control methods in 3-phase inverters: PWM techniques (sinusoidal PWM, space vector PWM), selective harmonic elimination, and voltage control through DC link voltage variation with their relative merits

Paper II

8 questions · 400 marks
Q1
50M Compulsory evaluate Control systems, microprocessors, measurements, power systems, data communication

(a) The block diagram of a system is as shown below : Evaluate the overall transfer function $\frac{Y(s)}{R(s)}$ using block diagram reduction technique. 10 (b) Explain the operation performed by 8085 microprocessor when the following instructions are executed : (i) JMP unconditionally (ii) POP (iii) PUSH (iv) RET (v) STC 2×5=10 (c) For the circuit shown in the figure below give expression for the overall uncertainty in the value of combined resistance R. Further, evaluate the overall uncertainty in the value of combined resistance R, when individual values of the resistors are as R₁ = 50 ± 0·1 Ω, R₂ = 100 ± 0·2 Ω, R₃ = 100 ± 0·2 Ω. 10 (d) A factory has a fixed load of 860 kW and is operating at 0·85 power factor. The electric utility company offers to supply energy at the following two alternate rates : (i) LV supply at ₹ 30/kVA max demand/annum + 12 paise/kWh (ii) HV supply at ₹ 25/kVA max demand/annum + 10 paise/kWh The HV switchgear costs ₹ 50/kVA and switchgear losses at full load amount to 4%. Interest and depreciation charges for switchgear are 10% of the capital cost. If the factory is to work 48 hours/week, then determine the more economical tariff option. 10 (e) If the generator polynomial is (x⁴ + x + 1) and the message bits are 1101101, then obtain the CRC code. 10

Answer approach & key points

Evaluate requires systematic analysis with quantitative rigour. Structure: (a) Block diagram reduction (10 marks, ~25% time) – apply Mason's gain formula or successive reduction; (b) 8085 instructions (10 marks, ~20% time) – explain opcode fetch, memory read/write cycles for each; (c) Uncertainty analysis (10 marks, ~20% time) – derive partial derivative formula then substitute values; (d) Tariff economics (10 marks, ~25% time) – calculate annual costs for both options including switchgear economics; (e) CRC generation (10 marks, ~10% time) – perform polynomial division. No conclusion needed; present each part clearly with part-headers.

  • Part (a): Correct application of block diagram reduction rules (shifting take-off points, combining blocks in series/parallel, eliminating feedback loops) to obtain Y(s)/R(s)
  • Part (b): Accurate description of T-states, memory operations, stack pointer manipulation, and flag effects for all five 8085 instructions (JMP, POP, PUSH, RET, STC)
  • Part (c): Derivation of uncertainty propagation formula using partial derivatives for combined resistance, followed by numerical evaluation with given tolerances
  • Part (d): Complete economic analysis including kVA demand calculation, annual energy consumption, switchgear capital and running costs, and comparison of LV vs HV tariffs
  • Part (e): Correct polynomial long division of message bits by generator polynomial (x⁴+x+1) to obtain 4-bit CRC remainder and final codeword
  • Recognition that parts (a), (c), (d), (e) require numerical working while (b) requires descriptive technical depth
  • Proper unit handling and significant figure discipline in all calculations
  • Cross-verification of results (e.g., checking CRC by polynomial multiplication)
Q2
50M design Control systems, microprocessors, electrical measurements

(a) An LTI system with the following state-space representation is given : ẋ = [0 1] x + [0] u [0 -0.5] [k] y = [1 0] x Design a phase lead compensator so that the system achieves a settling time of 2 seconds for a 2% tolerance band and has a damped natural frequency of 2 rad/s. Also realize the designed compensator using passive components. 20 (b) For 8085 microprocessor, write the instructions to perform the following : (i) Set the zero flag when a register pair is used as a down counter (ii) Load the accumulator with the contents of location 2050H, if memory location 2050H contains byte F8H (iii) Load 3AH in memory location 2050H, if registers H and L contain 20H and 50H (iv) Subtract 25H with borrow from accumulator, if the accumulator contains 37H and the borrow flag is set (v) Complement the accumulator, which has data byte 89H 4×5=20 (c) A moving-coil instrument with a resistance of 10 Ω gives full-scale deflection for a current of 1 mA. A manganin shunt is used to extend its range to 1 A. Calculate the error caused by a 5 °C fall in temperature, when— (i) the manganin shunt is directly connected across the moving coil; (ii) a 90 Ω manganin resistance is used in series with the moving coil, before applying manganin shunt. Assume temperature coefficient of copper as 0·004/°C and that of manganin as 0·00015/°C. 10

Answer approach & key points

Begin with the directive 'design' for the compensator in part (a), which carries the highest marks (20). Structure the answer as: (a) state-space analysis → compensator design → passive realization (~40% time); (b) 8085 assembly instructions with clear mnemonics and comments (~40% time); (c) thermal error calculations with proper temperature coefficient handling (~20% time). No formal conclusion needed; ensure each sub-part is clearly labelled.

  • Part (a): Derive transfer function from state-space, calculate required phase lead angle from settling time and damped natural frequency specifications, determine compensator parameters (α, T), and realize using R-C network with component values
  • Part (b)(i): Correct use of DCX/DCR/DAD/DAD with conditional jump (JZ) to set zero flag for register pair down counter operation
  • Part (b)(ii): Proper addressing mode using LDA 2050H or LHLD with appropriate register loading
  • Part (b)(iii): Correct use of MVI M,3AH or MOV M,A with accumulator preload when HL=2050H
  • Part (b)(iv): SBB instruction for subtract with borrow, showing accumulator result 11H with flag status
  • Part (b)(v): CMA instruction for complement, result 76H with proper flag effects
  • Part (c)(i): Calculate shunt resistance (10/999 Ω), apply temperature coefficients for copper and manganin, determine error due to 5°C fall
  • Part (c)(ii): Recalculate with 90Ω series manganin resistance, show improved temperature compensation and reduced error
Q3
50M solve Control systems, bridge measurements, microprocessor interrupts

(a) (i) Sketch the approximate root locus plot for a time-delay system approximated by the transfer function $$G(s) = \frac{K\left(1-\frac{s}{2}\right)}{s(s+1)\left(1+\frac{s}{2}\right)}$$ Also compute the largest value of K for which the system is stable under unity feedback. Verify this value from the root locus plot. 10 (ii) The signal flow graph of a system is as shown below : [Diagram] Determine the overall transmission $\frac{R(s)}{Y(s)}$, and evaluate the sensitivity of the output to variations in $K_1$ at $s=10$. What would be the value of sensitivity obtained under DC condition, i.e., $s=0$? 10 (b) A bridge consists of the following configurations : Arm AB : A choke coil of unknown resistance R₁ and unknown inductance L₁ Arm BC : A non-inductive resistance R₃ Arm DA : A non-inductive resistance R₂ Arm CD : A mica condenser with capacitance C₄ in series with a non-inductive resistance R₄ Bridge balance is obtained at 400 Hz with the following component values : R₂ = 2000 Ω, R₃ = 500 Ω, C₄ = 0·2 μF, R₄ = 70·9 Ω Assume that capacitor has a series resistance of 0·1 Ω. Calculate the resistance and inductance of the choke coil. Also sketch the phasor diagram for the bridge under balanced conditions, and evaluate Q factor of the choke coil. 20 (c) Explain maskable interrupt. Draw the timing diagram for the maskable interrupt acknowledgement cycle. List the activities in each clock cycle. 10

Answer approach & key points

Solve this multi-part technical question by allocating approximately 40% effort to part (a) root locus and signal flow graph (20 marks), 40% to part (b) AC bridge calculations (20 marks), and 20% to part (c) 8085/8086 maskable interrupt explanation (10 marks). Begin with clear problem statements for each sub-part, present systematic derivations with intermediate steps, verify numerical results through cross-checks, and conclude with physical interpretations of stability margins, bridge balance conditions, and interrupt handling in Indian microprocessor-based systems.

  • Part (a)(i): Correct identification of poles at s=0, s=-1, s=-2 and zero at s=2; proper sketch of root locus showing RHP zero effect and asymptotic behavior; Routh-Hurwitz or direct substitution to find K_max=2 for stability
  • Part (a)(ii): Application of Mason's gain formula to signal flow graph; correct forward paths and loop identification; sensitivity calculation ∂T/∂K₁ · K₁/T at s=10 and s=0 showing unity sensitivity at DC
  • Part (b): Correct impedance expressions for each arm; balance condition Z₁Z₄ = Z₂Z₃ with complex algebra; calculation of R₁=500Ω, L₁=0.5H accounting for capacitor series resistance; proper phasor diagram with current and voltage relationships; Q-factor ≈ 6.28
  • Part (c): Clear distinction between maskable (INTR) and non-maskable interrupts; 8085-specific timing diagram showing T1-T4 states with INTA generation; clock-wise listing of PC save, ISR address fetch, and execution transfer
  • Cross-verification: Stability limit K=2 confirmed by root locus crossing imaginary axis; bridge balance verified by phase angle cancellation; interrupt cycle matched to standard 8085 microprocessor textbook specifications
Q4
50M solve Control systems, microprocessor programming, piezoelectric transducers

(a) (i) Consider a second-order type-1 system with no zeros. The system under unity feedback admits a resonant peak of 1·36 at resonant frequency 8·2 rad/s. Compute the transfer function G(s), and its steady-state error due to input signal x(t) = 2u(t) + 3t·u(t) under unity feedback. 10 (ii) For the system shown in the figure below the unit step response is given by $$y(t) = 1 - 1.15 e^{-2t} \sin\left(3.464t + \frac{\pi}{3}\right)$$ Obtain the state-space representation of the system in observable canonical form. 10 (b) (i) For 8085 microprocessor, write a program to do the following : 1. Clear the accumulator 2. Add 47H (using ADI instruction) 3. Subtract 92H 4. Add 64H 5. Display the results after subtracting 92H and after adding 64H Specify the answer you would expect at the output port. Also give the reason for clearing the accumulator before adding the number 47H directly to the accumulator. (ii) Write the instruction to clear the CY flag to load FFH in register B and increment (B). If the CY flag is set, display 1 at the output port; otherwise, display the contents of register B. Explain your result. (c) A quartz piezoelectric transducer having a capacitance of 3000 pF and voltage sensitivity of 0.06 V-m/N has a resistance of 10^7 MΩ. The impedance of the measuring system has a capacitance of 300 pF in parallel with a 1 MΩ resistance. A force as shown in the figure is applied across the transducer : Find the voltages just before and after t = 4 ms. [Permittivity of quartz is 40.6×10^-12 F/m]

Answer approach & key points

Solve all four sub-parts systematically, allocating approximately 35% time to (a)(i) control system analysis with resonant peak and steady-state error calculations, 25% to (a)(ii) state-space derivation from given response, 25% to (b) 8085 assembly programming with proper instruction sequences and flag handling, and 15% to (c) piezoelectric transducer voltage calculations at specific time instants. Present derivations step-by-step with clear final answers for each sub-part.

  • For (a)(i): Derive damping ratio ξ=0.5 from resonant peak Mr=1.36, compute natural frequency ωn=9.43 rad/s, obtain G(s)=ωn²/[s(s+2ξωn)], and calculate steady-state error ess=0.636 for the given input
  • For (a)(ii): Extract poles at -2±j3.464 from the response, determine ωn=4 rad/s and ξ=0.5, construct observable canonical form with appropriate A, B, C matrices
  • For (b)(i): Write correct 8085 program using MVI A,00H; ADI 47H; SUI 92H; OUT PORT1; ADI 64H; OUT PORT2; explain accumulator clearing prevents garbage value accumulation
  • For (b)(ii): Use STC/CMC instructions for CY flag manipulation, demonstrate conditional branching with JC/JNC, show FFH+1=00H with CY=1 causing output 01H at port
  • For (c): Calculate transducer voltage V=0.06×F/Cp, determine time constant τ=RC=3.3ms, compute voltages at t=4ms⁻ and t=4ms⁺ considering charge redistribution between transducer and measuring capacitance
Q5
50M Compulsory calculate Control systems, measurements, power systems, communication

(a) Given a second-order linear time-invariant system G(s) with a relative degree of 2. G(s) admits a zero steady-state error for unit step input and steady-state error of 0·1 for unit ramp input under unity feedback configuration. Further, it admits a settling time of 4 seconds for 2% tolerance band in its unit step response under unity feedback. A delay of T seconds is now placed in cascade with G(s). Calculate the value of T in seconds that will make the delayed system oscillate under unity feedback configuration. 10 marks (b) A frequency counter with an accuracy of ±1LSD ±(1×10⁻⁶) is employed to measure frequencies of 100 Hz, 1 MHz and 100 MHz. Calculate the percentage measurement error in each case. What is the effect of time base on error? 10 marks (c) An 11 kV, 50 Hz alternator is connected to a system which has inductance and capacitance per phase of 10 mH and 0·01 µF respectively. Determine (i) the maximum voltage across circuit breaker contacts, (ii) the frequency of transient oscillation, (iii) the average RRRV and (iv) the maximum RRRV. 10 marks (d) Four 50 MVA alternators of 15% reactance each are connected via four 35 MVA reactors each of 10% reactance to a common bus bar. The feeders are connected to the junction of each alternator and its reactor. Determine the rating of each feeder circuit breaker. 10 marks (e) A code is made up of 'dots' and 'dashes'. Assuming that a dash is three times as long as a dot with one-third the probability of occurrence of a dot, calculate— (i) the information in a dot and a dash; (ii) the entropy of the dot-dash code; (iii) the average rate of information, if a dot lasts for 10 ms and this time is allowed between symbols. 10 marks

Answer approach & key points

Begin by identifying the directive 'calculate' demands precise numerical solutions across all five sub-parts. Allocate approximately 20% time each: for (a) derive ζ and ωn from steady-state and transient specifications, then apply Nyquist/delay stability criterion; for (b) compute percentage errors using LSD and time-base accuracy formulas; for (c) apply restriking voltage transient analysis for circuit breaker ratings; for (d) calculate fault MVA using symmetrical components for breaker sizing; for (e) apply Shannon entropy and information rate formulas. Present each sub-part with clear problem statement, formula application, substitution, and boxed final answer.

  • Part (a): Extract ζ=0.456 and ωn=2.19 rad/s from given specifications; determine critical delay T=0.458s using phase margin=0 condition for oscillation
  • Part (b): Calculate ±1LSD errors (±1%, ±10⁻⁴%, ±10⁻⁶%) and time-base errors; show percentage errors are 1.000001%, 0.000101%, and 0.000002% respectively; explain inverse relationship between frequency and time-base error contribution
  • Part (c): Compute maximum restriking voltage = 2×11√2/√3 = 17.96 kV; transient frequency = 1/(2π√(LC)) = 15.92 kHz; average RRRV = 4fVmax and maximum RRRV = ωVmax
  • Part (d): Calculate equivalent reactance of parallel alternator-reactor branches; determine fault level at bus; feeder breaker rating = 50 MVA based on alternator contribution to fault
  • Part (e): With P(dot)=0.75, P(dash)=0.25, calculate I(dot)=0.415 bits, I(dash)=2 bits; entropy H=0.811 bits/symbol; average symbol duration=13.33 ms; information rate=60.8 bits/second
Q6
50M solve Power system transmission, communication systems, protection

(a) Determine the sending-end voltage, current, power factor of a single-phase, 50 Hz, 76·2 kV transmission line delivering a load of 12 MW at 0·8 p.f. lagging. The line constants are R = 25 Ω, inductance 200 mH and capacitance between lines is 2·5 μF. Also determine the regulation and efficiency of the transmission. Use nominal-π method. Draw the phasor diagram. 20 marks (b) 24 voice signals are sampled uniformly and then time-division multiplexed. Flat-top sampling is used with one microsecond duration. Multiplexing operation provides for synchronization by adding an extra pulse of sufficient amplitude and also one microsecond duration. The highest frequency component of each voice signal is 3·4 kHz. (i) Assuming a sampling rate of 8 kHz, find the spacing between successive pulses of the multiplexed signal. (ii) Repeat your calculations by assuming the use of Nyquist rate sampling. 20 marks (c) A 3-phase, 33 kV, star-connected alternator is to be protected using circulating current protection. The pilot wires are connected to the secondary windings of 100/5 ratio current transformer. The protective relay is adjusted to operate with an out of balance current of 1 A in the pilot wires. Determine (i) the earthing resistance which will protect 90% of the winding and (ii) the percent of the winding which would be protected, if the earthing resistance is 15 Ω. 10 marks

Answer approach & key points

Solve this multi-part numerical problem by allocating approximately 40% time to part (a) given its 20 marks and complexity, 40% to part (b) for its dual sampling calculations, and 20% to part (c) for protection settings. Begin each part with stated assumptions and formulas, proceed through systematic calculations, and conclude with clearly boxed final answers. For part (a), explicitly draw the phasor diagram showing sending-end and receiving-end quantities.

  • Part (a): Correct application of nominal-π method with proper ABCD parameters calculation; accurate sending-end voltage (magnitude and angle), current, power factor, regulation and efficiency
  • Part (a): Phasor diagram showing VR, VS, IS, IR, and capacitor currents with proper phase relationships
  • Part (b)(i): Correct calculation of frame duration (125 μs), total slots (25), and pulse spacing (4 μs) for 8 kHz sampling
  • Part (b)(ii): Recalculation with Nyquist rate (6.8 kHz) showing modified frame duration and pulse spacing
  • Part (c)(i): Determination of earthing resistance for 90% winding protection using sequence networks and fault current distribution
  • Part (c)(ii): Calculation of protected percentage when earthing resistance is fixed at 15 Ω
Q7
50M calculate Power system fault analysis and protection

(a) Two generators are connected in parallel to the low-voltage side of a 3-phase, Δ-Y transformer as shown below : Generator 1 is rated 60 MVA, 13·8 kV Generator 2 is rated 30 MVA, 13·8 kV Each generator has a subtransient reactance of 20%. The transformer is rated 90 MVA, 13·8 Δ/69 Y kV with a reactance of 10%. Before the fault occurs, the voltage on the high-tension side of the transformer is 66 kV. The transformer is unloaded, and there is no circulating current between the generators. Find the subtransient current in each generator, when a 3-phase short circuit occurs on the high-tension side of the transformer : (20 marks) (b) (i) What is line coding? For the data sequence 10101110, draw the waveforms for the following line coding schemes : 1. Polar NRZ scheme 2. Bipolar NRZ scheme 3. Differential Manchester scheme 4. RZ polar scheme (10 marks) (ii) A PCM system uses 4096 quantization levels to handle telephone signals with a volume range of 40 dB. 1. What is the SNR for maximum sinusoidal signal level? 2. What is the SNR level for the smallest sinusoidal signal level? 3. With a 10 dB compression provided, what will be the new SNR? (10 marks) (c) With the help of schematic and circuit diagrams, describe the operation of a static differential protection relay, using the rectifier bridge amplitude comparator. (10 marks)

Answer approach & key points

Calculate the subtransient fault currents in part (a) by first converting all reactances to a common base and constructing the equivalent circuit, then apply per-unit analysis. For part (b), define line coding with clear waveform drawings for all four schemes, then calculate SNR values using the PCM quantization formula with proper dB conversions. For part (c), describe the static differential relay operation with complete schematic and circuit diagrams showing the rectifier bridge comparator. Allocate approximately 40% time to (a) given its 20 marks, 30% to (b) covering both sub-parts, and 30% to (c) for diagrams and description.

  • Part (a): Convert generator and transformer reactances to common 90 MVA base; calculate subtransient reactances as Xg1=0.3 pu, Xg2=0.6 pu, Xt=0.1 pu; determine pre-fault voltage as 0.957 pu on HV side; compute fault current distribution using current division between parallel generators
  • Part (a): Calculate subtransient current in Generator 1 as approximately 4.78 kA and Generator 2 as approximately 2.39 kA (or equivalent in per-unit with proper base current calculations)
  • Part (b)(i): Define line coding as the process of converting binary data into digital signals for transmission; draw correct waveforms for Polar NRZ (high=1, low=0), Bipolar NRZ (alternate polarity for 1s), Differential Manchester (transition at start of bit, mid-bit for 0), and RZ polar (return to zero mid-bit)
  • Part (b)(ii): Calculate SNRmax = 6.02×12 + 1.76 = 74 dB for 4096 levels (n=12 bits); SNRmin = 74 - 40 = 34 dB; with 10 dB compression, new SNR = 44 dB using proper dynamic range and companding formulas
  • Part (c): Describe static differential protection using rectifier bridge amplitude comparator with schematic showing CT connections, restraint and operating coils, and full-wave rectifier bridge; explain operation for internal faults (operate) vs external faults (restrain) with proper polarized relay characteristics
Q8
50M solve Power system stability and cable capacitance

(a) The figure below shows the single-line diagram of a generator connected through parallel transmission lines to an infinite bus. The machine is delivering 1 pu power, and both the terminal voltage and the infinite bus voltage are 1 pu. The numbers on the diagram indicate the values of the reactances on a common system base. The transient reactance of the generator is 0·20 pu as indicated. Determine the power-angle equation for the system applicable to the operating conditions. Also develop the swing equation of the machine : Given H = 4 MJ/MVA. (20 marks) (b) Draw the diagram of a 1/3 rate convolution encoder. Write the corresponding code tree for the 1/3 rate convolution encoder. (20 marks) (c) The capacitances of a 3-core cable of belted type are measured and found to be as follows : (i) Between 3 cores bunched together and the sheath, 8 µF (ii) Between one conductor and the other two connected together to the sheath, 5 µF Calculate the capacitance to the neutral and the total charging kVA, when the cable is connected to an 11 kV, 50 Hz, 3-phase supply. (10 marks)

Answer approach & key points

Solve this multi-part numerical problem by allocating approximately 40% time to part (a) given its 20 marks and computational complexity, 40% to part (b) for the encoder diagram and code tree construction, and 20% to part (c) for cable capacitance calculations. Begin with a brief system description, then present each part sequentially with clear headings, ensuring all derivations show intermediate steps and final answers are boxed with proper units.

  • Part (a): Calculate equivalent reactance of parallel transmission lines (0.4||0.4 = 0.2 pu), total reactance between generator internal bus and infinite bus (0.2+0.2+0.2+0.2 = 0.8 pu), power-angle equation P = (1×1/0.8)sinδ = 1.25sinδ, and swing equation (H/πf)(d²δ/dt²) = Pm - Pe with H=4 MJ/MVA
  • Part (b): Draw 1/3 rate convolutional encoder with constraint length K and generator polynomials (typically g0, g1, g2), showing shift registers and modulo-2 adders; construct complete code tree showing all possible state transitions and output sequences for input bits 0 and 1
  • Part (c): Use given measurements to find core-to-core capacitance Cc and core-to-sheath capacitance Cs from equations: 3Cs = 8 µF and 2Cc + Cs = 5 µF, yielding Cs = 8/3 µF and Cc = 7/6 µF; calculate capacitance to neutral Cn = 3Cc + Cs = 8.5 µF and charging kVA = √3×VLL×IC = √3×11×10³×2π×50×8.5×10⁻⁶×11×10³/√3
  • Correct application of per-unit system and conversion to actual values where required
  • Proper labeling of all diagrams with component values and clear state representation in code tree

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