Q1 50M Compulsory solve Circuit analysis, signals and systems, electronics
(a) In the circuit given below, find the voltages at point A and point B. 10 marks
(b) Determine the time domain signal x(t) corresponding to the DTFT given below : 10 marks
(c) Draw the output voltage waveform of the circuit given below for 5 V, 50 Hz ac rms input. Forward voltage drop in diode D₁ is 0·6 V. 10 marks
(d) Design a sequential circuit with two D flip flops A and B and one input X. Let the state of the circuit remain the same for X = 0. However, when X = 1, the circuit goes through the state transitions from 00 to 10 to 11 to 01, back to 00 and then repeats. 10 marks
(e) Calculate Z-parameters for the two-port network given in the circuit diagram. 10 marks
हिंदी में पढ़ें
(a) नीचे दिए गए परिपथ में, बिंदु A तथा बिंदु B पर वोल्टता ज्ञात कीजिए। 10
(b) नीचे दिए गए DTFT के संगत समय-प्रक्षेत्र (डोमेन) संकेत x(t) को ज्ञात कीजिए। 10
(c) 5 V, 50 Hz ac rms निवेश के लिए नीचे दिए गए परिपथ का निर्गत वोल्टता तरंगरूप खींचिए। डायोड D₁ में अग्र वोल्टता अवपात 0·6 V है। 10
(d) दो D फ्लिप-फ्लॉपों A एवं B के साथ एक X निवेश वाला एक अनुक्रमिक परिपथ अभिकल्पित कीजिए। मान लीजिए कि X = 0 के लिए परिपथ अपरिवर्तित रहता है। तथापि जब X = 1 हो, तो परिपथ 00 से 10 से 11 से 01, पुनः 00 अवस्था संक्रमणों से गुजरता है तथा फिर यही दोहराता है। 10
(e) परिपथ आरेख में दिए गए द्वि-पोर्ट जालक्रम के लिए Z-प्राचलों की गणना कीजिए। 10
Answer approach & key points
Solve all five sub-parts systematically, allocating approximately 20% time to each part since all carry equal marks. For (a), apply KCL/KVL or nodal analysis; for (b), use inverse DTFT properties; for (c), sketch the rectified waveform showing clipping at 0.6V; for (d), construct state table and derive D flip-flop excitation equations; for (e), use open-circuit impedance measurements. Present each solution with clear circuit diagrams, mathematical steps, and final boxed answers.
- Part (a): Correct application of nodal analysis or superposition theorem to find VA and VB with proper sign conventions
- Part (b): Accurate inverse DTFT calculation using synthesis equation or standard transform pairs, with proper handling of periodicity
- Part (c): Correct peak voltage calculation (5√2 V), identification of conduction angle, and waveform showing 0.6V offset during positive half-cycles
- Part (d): Complete state diagram, state table, excitation table for D flip-flops, and minimized Boolean expressions for DA and DB
- Part (e): Correct application of Z-parameter definitions (z11=V1/I1 at I2=0, etc.) with proper mesh or nodal analysis of the two-port network
- All parts: Proper unit handling (volts, ohms, seconds, Hz) and significant figures appropriate for engineering calculations
- Diagrams: Clear labeling of components, nodes, reference directions, and waveform axes with time/voltage scales
- Sequential design: Verification that the designed circuit returns to state 00 after 01 when X=1, maintaining self-starting property
Q2 50M solve RC circuits, op-amp oscillators, Z-transform
(a) In the circuit shown in the diagram, initially key K₁ is closed and capacitor has no charge (at time t = 0). Now at time t = 10 seconds, key K₁ is opened and at t = 18·68 seconds it is again closed. Plot output voltage across the capacitor with respect to time and find output voltage values at time 10 seconds, 18·68 seconds and 28·68 seconds. 20 marks
(b) Consider the circuit of an operational amplifier given here in which Zener diodes Z₁ and Z₂ are having reverse breakdown voltage = 7·4 V and forward voltage drop = 0·6 V. (i) Draw the output voltage waveform showing voltage value with time and calculate frequency of output waveform. (ii) Modify the circuit for duty cycle factor D = 0·25 by replacing R₁ from combination of suitable resistances and diodes, so that output frequency is not changed. 20 marks
(c) Determine the causal signal x[n] if its z-transform X(z) is specified by a pole-zero pattern shown in the figure below. Take the constant G = 1/4. 10 marks
हिंदी में पढ़ें
(a) आरेख में प्रदर्शित परिपथ में, आरंभ में कुंजी K₁ संयोजित है तथा संधारित्र में कोई आवेश नहीं है (समय t = 0 पर)। अब समय t = 10 सेकंड पर कुंजी K₁ को विचोजित कर दिया जाता है और t = 18·68 सेकंड पर पुनः संयोजित कर दिया जाता है। समय के सापेक्ष संधारित्र के आर-पार निर्गत वोल्टता आरेखित कीजिए तथा समय 10 सेकंड, 18·68 सेकंड और 28·68 सेकंड पर निर्गत वोल्टता मान ज्ञात कीजिए। 20
(b) यहाँ दिए गए एक संक्रियात्मक प्रवर्धक के परिपथ पर विचार कीजिए, जिसमें जेनर डायोड Z₁ और Z₂ की प्रतिप भंजन (ब्रेकडाउन) वोल्टता = 7·4 V तथा अग्र वोल्टता अवपातन = 0·6 V है। (i) समय के साथ वोल्टता का मान प्रदर्शित करते हुए, निर्गत वोल्टता तरंगरूप को आरेखित कीजिए तथा निर्गत तरंगरूप की आवृत्ति की गणना कीजिए। (ii) R₁ को उपयुक्त प्रतिरोधों और डायोडों के संयोजन से बदल कर परिपथ को कर्म चक्र गुणांक D = 0·25 के लिए इस प्रकार रूपांतरित कीजिए ताकि निर्गत आवृत्ति अपरिवर्तित रहे। 20
(c) यदि हेतुक संकेत x(n) का z-रूपान्तर X(z) नीचे दिए गए चित्र में प्रदर्शित ध्रुव-शून्यक प्रतिरूप के द्वारा निर्दिष्ट होता है, तो हेतुक संकेत x(n) ज्ञात कीजिए। स्थिरांक G = 1/4 लीजिए। 10
Answer approach & key points
Solve this multi-part numerical problem by first analyzing the RC transient circuit in (a) with proper time-constant calculations for charging/discharging phases, then analyze the op-amp astable multivibrator in (b)(i)-(ii) for frequency and duty cycle modification, and finally perform inverse Z-transform for (c). Allocate approximately 40% time to part (a) given its 20 marks and complex multi-interval analysis, 40% to part (b) covering both frequency calculation and circuit redesign, and 20% to part (c) for the pole-zero inversion. Present each part with clear sectional headings, state assumptions explicitly, show all formulae before substitution, and conclude with verified numerical answers.
- Part (a): Correct application of RC charging equation Vc = V(1-e^(-t/RC)) for 0-10s, discharging equation Vc = V₀e^(-t/RC) for 10-18.68s, and recharging from 18.68s with appropriate initial conditions; identification that 18.68s equals one time constant for discharge
- Part (b)(i): Recognition of op-amp as astable multivibrator with Zener clamping; correct calculation of threshold voltages using Zener breakdown (7.4V) and forward drop (0.6V); derivation of frequency formula f = 1/(2R₁C₁ln((1+β)/(1-β))) or simplified form with β = R₂/(R₁+R₂)
- Part (b)(ii): Design of asymmetric timing circuit using parallel branches with diodes to create different charging/discharging resistances while maintaining same total period; selection of resistor values to achieve D = 0.25 (25% duty cycle) with ton = T/4 and toff = 3T/4
- Part (c): Identification of poles and zeros from given pattern; construction of X(z) = G·(z-z₁)(z-z₂).../((z-p₁)(z-p₂)...); partial fraction expansion and inverse Z-transform using standard pairs; causal sequence verification through ROC analysis (outside outermost pole)
- Cross-cutting: Proper unit handling, significant figures consistent with given data (2 decimal places for time values), and physical verification of results (e.g., capacitor voltage cannot exceed supply, frequency in practical audio/radio range)
Q3 50M solve Boolean functions, transistor amplifiers, LTI systems
(a) Consider the Boolean function: F(A, B, C, D) = Σ m (1, 3, 4, 11, 12, 13, 14, 15). Implement it with a 4-to-1 multiplexer and external gates. Connect inputs A and B to the selection lines. Input to the four data lines is a function of the variables C and D which are obtained by expressing F as a function of C and D for each of the four cases when AB = 00, 01, 10 and 11. Functions are to be implemented with external gates. (20 marks)
(b) In the circuit given below, transistors T₁ and T₂ are having V_BE = 0.6 V and β = 499.
(i) Calculate small signal ac voltage gain of the amplifier at 20 Hz and 2 kHz.
(ii) Find dc voltages on collectors of transistors T₁ and T₂ respectively. (20 marks)
(c) Impulse response of an LTI system, h(n) is defined in the interval N₀ ≤ n ≤ N₁. If the input x(n) to the LTI system is zero except in the interval N₂ ≤ n ≤ N₃, find the interval for which the output y(n) exists in forms of N₀, N₁, N₂ and N₃. (10 marks)
हिंदी में पढ़ें
(a) बूलिय फलन F(A, B, C, D) = Σ m (1, 3, 4, 11, 12, 13, 14, 15) पर विचार कीजिए। इसका 4 से 1 बहुसंकेतक तथा बाह्य कपाटों (गेट्स) से कार्यान्वयन कीजिए। निवेश A तथा B को चयन पंक्तियों से संयोजित कीजिए। चारों आंकड़ा लाइनों में निवेश, चर C और D का फलन है जिसे प्रत्येक चारों परिस्थितियों AB = 00, 01, 10 तथा 11 में F को C और D के फलन के रूप में व्यक्त कर प्राप्त किया जाता है। फलन का कार्यान्वयन बाह्य कपाटों (गेटों) द्वारा करना है। (20 अंक)
(b) नीचे दिए गए परिपथ में, ट्रांजिस्टर T₁ तथा T₂ के लिए V_BE = 0.6 V और β = 499 है।
(i) प्रवर्धक की 20 Hz और 2 kHz पर लघु संकेत ac वोल्टता लाभ संगणित कीजिए।
(ii) क्रमशः ट्रांजिस्टर T₁ तथा T₂ के कलेक्टरों पर dc वोल्टता ज्ञात कीजिए। (20 अंक)
(c) एक LTI तंत्र की आवेग अनुक्रिया h(n), अंतराल N₀ ≤ n ≤ N₁ में परिभाषित है। यदि अंतराल N₂ ≤ n ≤ N₃ को छोड़कर LTI तंत्र में निवेश x(n) शून्य है, तो वह अंतराल ज्ञात कीजिए जिसके लिए निर्गत y(n) का अस्तित्व N₀, N₁, N₂ और N₃ के फलन के रूप में है। (10 अंक)
Answer approach & key points
Solve this multi-part problem by allocating time proportionally to marks: approximately 40% on part (a) multiplexer design, 40% on part (b) transistor amplifier analysis, and 20% on part (c) LTI system interval calculation. Begin with clear K-map derivation for (a), proceed to complete DC and AC analysis for (b) including frequency-dependent gain calculations, and conclude with rigorous mathematical derivation of convolution intervals for (c).
- For (a): Construct 4-variable K-map for F(A,B,C,D) = Σm(1,3,4,11,12,13,14,15), group minterms, and express F as function of C,D for each AB combination (00,01,10,11) to determine multiplexer data inputs
- For (a): Draw 4-to-1 MUX with A,B as select lines and implement derived C,D functions using external AND/OR/NOT gates for each data input
- For (b)(i): Calculate DC operating point (ICQ, VCEQ), then determine small-signal parameters (gm, rπ), and compute voltage gain at 20 Hz (considering coupling/bypass capacitor effects) and 2 kHz (mid-band)
- For (b)(ii): Determine VC1 and VC2 using KVL analysis with given VBE = 0.6V and β = 499, accounting for transistor biasing network
- For (c): Apply convolution sum property y(n) = x(n)*h(n) to derive output interval [N₀+N₂, N₁+N₃] with proper justification using support interval mathematics
Q4 50M solve Schottky transistor, Fourier transform, maximum power transfer
(a) For the Schottky transistor circuit shown below, determine I_B, I_D, I_C and V_CE. Next, remove the Schottky diode and determine I_B, I_D, I_C and V_CE assuming additional values of V_BE (sat.) = 0.8 V and V_CE (sat.) = 0.1 V. Assume parameter values of β = 50, V_BE (on) = 0.7 V and V_f = 0.3 V for the Schottky diode. (20 marks)
(b) Find the Fourier transform of the following signals:
(i) x(t) = [2sin(3πt)/πt] · [sin(2πt)/πt]
(ii) x(t) = ∫_{-∞}^{t} [sin(2πt)/πt] dt
Specify the properties used. (20 marks)
(c) In the circuit shown below, V_s is the ac voltage source given by V_s = V_0 cos ωt, with V_0 = 14.14 V and ω = 300 rad/sec. Calculate the value of load resistance R_L for maximum power transfer and also find out maximum power transferred to load. k = 1, n = 0.2 (Turns Ratio) (10 marks)
हिंदी में पढ़ें
(a) नीचे प्रदर्शित शॉटकी ट्रांजिस्टर परिपथ के लिए I_B, I_D, I_C तथा V_CE के मान निर्धारित कीजिए। फिर, परिपथ से शॉटकी डायोड निकाल कर पुनः I_B, I_D, I_C और V_CE के मान निर्धारित कीजिए। मान लीजिए कि V_BE (sat.) = 0.8 V और V_CE (sat.) = 0.1 V के अतिरिक्त मान हैं तथा शॉटकी डायोड के लिए प्राचलों के मान β = 50, V_BE (on) = 0.7 V और V_f = 0.3 V हैं। (20 अंक)
(b) निम्नलिखित संकेतों के फुरिये रूपांतर ज्ञात कीजिए:
(i) x(t) = [2sin(3πt)/πt] · [sin(2πt)/πt]
(ii) x(t) = ∫_{-∞}^{t} [sin(2πt)/πt] dt
प्रयुक्त गुणधर्म निर्दिष्ट कीजिए। (20 अंक)
(c) नीचे प्रदर्शित परिपथ में V_s एक ac वोल्टता स्रोत है जिसका मान V_s = V_0 cos ωt है, तथा V_0 = 14.14 V और ω = 300 rad/sec. है। अधिकतम शक्ति अंतरण के लिए भार प्रतिरोध R_L के मान की गणना कीजिए और भार में अंतरित अधिकतम शक्ति भी ज्ञात कीजिए। k = 1, n = 0.2 (फेरा अनुपात) (10 अंक)
Answer approach & key points
Solve this multi-part numerical problem by allocating approximately 40% of effort to part (a) Schottky transistor analysis (20 marks), 40% to part (b) Fourier transform computations (20 marks), and 20% to part (c) maximum power transfer (10 marks). Begin with clear circuit diagrams for parts (a) and (c), then proceed with systematic calculations showing all intermediate steps. For part (b), explicitly state each Fourier property used before applying it. Conclude each sub-part with boxed final answers and brief physical interpretations.
- Part (a): Correct determination of I_B, I_D, I_C, V_CE with Schottky diode clamping (V_f = 0.3V), then recalculation without Schottky showing deep saturation (V_BE(sat)=0.8V, V_CE(sat)=0.1V)
- Part (b)(i): Application of multiplication-convolution duality property to find FT of product of two sinc functions, yielding triangular convolution of rectangular pulses in frequency domain
- Part (b)(ii): Use of time-integration property of FT (division by jω in frequency domain plus πδ(ω) term) applied to sinc function, recognizing integral of sinc as step response
- Part (c): Calculation of reflected impedance through coupled inductors (k=1, n=0.2), determination of Thevenin equivalent seen by load, and application of conjugate matching for maximum power transfer at ω=300 rad/s
- Explicit statement of Fourier properties used: multiplication-convolution duality for (b)(i), time-integration property for (b)(ii)