Q1
(a) For the circuit shown in Figure 1(a), find the V_in, V_S and power supplied by the dependent source. (10 marks) (b) Calculate the forward current caused by 0·8 V forward voltage across the diode with ideality factor of semiconductor material as 1. The reverse saturation current of diode is 12·674 × 10⁻¹³ A at a temperature of 22°C. [Assume Boltzmann constant K = 1·38 × 10⁻²³ JK⁻¹, charge of electron q = 1·6 × 10⁻¹⁹ C] (10 marks) (c) Find the efficiency of a long shunt compound generator rated at 250 kW, 230 V when supplying 75% rated load at rated voltage. The resistances of armature and series field are 0·009 Ω and 0·003 Ω respectively. The shunt field current is 13 A. When the machine is running as a motor at no-load, the armature current is 25 A at rated voltage. (10 marks) (d) An op-amp circuit is shown in Figure 1(d) below. Assume the op-amp to be ideal. (i) Determine I_1, I_2, I_3 and V_X. (ii) If V_0 is not to be lower than −13 V, calculate the maximum allowed value for R_L. (iii) If R_L is varied in the range 100 Ω to 1 kΩ, what is the corresponding change in I_L and in V_0? (10 marks) (e) Explain the parity bit generator and parity bit checker. Realize the even parity bit generator and even parity bit checker using X-OR gate. (10 marks)
हिंदी में प्रश्न पढ़ें
(a) चित्र 1(a) में दर्शाए गए परिपथ के लिए V_in, V_S और आश्रित स्रोत द्वारा आपूर्ति की गई शक्ति के मान ज्ञात कीजिए। (10 अंक) (b) तत्समक गुणांक 1 (एक) वाले अर्धचालक पदार्थ के डायोड के आर-पार 0·8 V अग्र बोल्टता के कारण उत्पन्न अग्र धारा का मान परिकलित कीजिए। 22°C तापमान पर डायोड की उत्क्रम संतृप्ति धारा 12·674 × 10⁻¹³ A है। [बोल्ट्ज़मान स्थिरांक K = 1·38 × 10⁻²³ JK⁻¹, इलेक्ट्रॉन का आवेश q = 1·6 × 10⁻¹⁹ C मान लीजिए] (10 अंक) (c) निर्धारित बोल्टता पर 75% निर्धारित भार की आपूर्ति करते समय 250 kW, 230 V द्वारा निर्धारित मान के एक दीर्घ पार्श्व पथ मिश्र कुंडलित जनित्र की दक्षता ज्ञात कीजिए। आर्मेचर एवं श्रेणी क्षेत्र के प्रतिरोध क्रमशः: 0·009 Ω और 0·003 Ω हैं। पार्श्व (शंट) क्षेत्र की धारा 13 A है। यह मशीन जब बिना किसी भार की मोटर की तरह कार्य करती है तो निर्धारित बोल्टता पर आर्मेचर की धारा 25 A है। (10 अंक) (d) चित्र 1(d) में संक्रियात्मक-प्रवर्धक (op-amp) परिपथ को नीचे दर्शाया गया है। संक्रियात्मक-प्रवर्धक (op-amp) को आदर्श मान लीजिए। (i) I₁, I₂, I₃ और Vₓ के मान ज्ञात कीजिए। (ii) Rₗ के अधिकतम अनुमत मान की गणना कीजिए, जबकि V₀ का मान −13 V से कम न हो। (iii) यदि R_L का मान 100 Ω से 1 kΩ की सीमा में परिवर्तित होता है, तो तदनुसार V_0 तथा I_L में क्या परिवर्तन होगा? (10 अंक) (e) पैरिटी बिट जनित्र व पैरिटी बिट परीक्षक की व्याख्या कीजिए। सम-पैरिटी बिट जनित्र व सम-पैरिटी बिट परीक्षक को X-OR गेट के प्रयोग द्वारा साकार कीजिए। (10 अंक)
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How this answer will be evaluated
Approach
Solve this multi-part numerical problem by allocating approximately 20% time to each sub-part (a)-(e), with sub-part (d) requiring additional attention for its three sub-sections. Begin with clear circuit diagrams for parts (a) and (d), apply fundamental laws (KCL/KVL, diode equation, generator/motor relations, op-amp virtual ground), show all derivation steps with proper units, and conclude with practical significance of results. For part (e), include truth tables and XOR gate diagrams for parity circuits.
Key points expected
- Part (a): Correct application of KCL/KVL to find V_in, V_S and power from dependent source; identification of controlling variable for dependent source
- Part (b): Accurate calculation of thermal voltage V_T at 22°C (295K), correct substitution in diode equation I = I_s[exp(V/nV_T) - 1] with ideality factor n=1
- Part (c): Proper calculation of armature current, series field drop, and efficiency for long shunt compound generator; correct treatment of no-load motor data for rotational losses
- Part (d)(i)-(iii): Application of ideal op-amp assumptions (virtual short, zero input current); correct nodal analysis for I_1, I_2, I_3, V_X; determination of R_L(max) from saturation limit; analysis of load regulation
- Part (e): Clear explanation of parity generation and checking for error detection; complete realization using XOR gates with proper logic diagrams and truth tables for even parity
- Consistent use of proper units (V, A, Ω, W) and significant figures throughout all numerical calculations
- Clear circuit diagrams for parts (a), (d), and (e) with labeled components and current/voltage polarities
- Physical interpretation of results: power flow direction, diode conduction regime, generator efficiency implications, op-amp operating limits, and parity scheme applications in data communication
Evaluation rubric
| Dimension | Weight | Max marks | Excellent | Average | Poor |
|---|---|---|---|---|---|
| Concept correctness | 20% | 10 | Correctly identifies dependent source type and control in (a); applies Shockley diode equation with proper thermal voltage in (b); distinguishes long shunt vs short shunt in (c); applies ideal op-amp constraints (virtual ground, infinite input impedance) in (d); explains odd/even parity distinction with error detection capability in (e) | Minor conceptual errors such as wrong polarity for dependent source, approximate thermal voltage without calculation, confusion between generator and motor operation, or incomplete parity explanation | Fundamental misconceptions like treating dependent source as independent, using wrong diode equation, applying short shunt formulas to long shunt, ignoring virtual ground concept, or describing parity without XOR logic |
| Numerical accuracy | 20% | 10 | Precise calculations: V_T = 25.5 mV at 295K, diode current ≈ 0.5 mA range, generator efficiency ~85-90%, correct op-amp currents in mA range, R_L(max) accurate to 2 significant figures; all values with proper units and reasonable engineering precision | Correct method but arithmetic errors or unit conversion mistakes (e.g., kW vs W, mA vs A); final answers within 10% of correct value; inconsistent significant figures | Order of magnitude errors, missing critical terms (e.g., ignoring -1 in diode equation for forward bias), wrong efficiency formula, or answers without units; demonstrates lack of numerical checking |
| Diagram quality | 15% | 7.5 | Clear hand-drawn or imagined circuit diagrams for (a) and (d) with labeled nodes, reference directions, and component values; neat XOR gate diagrams for (e) with proper ANSI/IEEE symbols; truth tables with clear headers | Diagrams present but poorly labeled, missing reference polarities, or freehand sketches lacking clarity; gate symbols non-standard but recognizable; incomplete truth tables | Missing essential diagrams, incorrect circuit topology, wrong gate symbols, or no visual representation for parity circuits; diagrams that contradict written solution |
| Step-by-step derivation | 25% | 12.5 | Systematic KCL/KVL equations for (a); explicit V_T calculation before diode equation; clear power flow diagram for generator with all loss components; nodal equations for op-amp circuit; Boolean expressions derived for parity; each step justified with physical reasoning | Some steps skipped or combined without justification; missing intermediate results; correct final answer but unclear how obtained; minimal explanation of algebraic manipulations | Disjointed calculations without logical flow; missing essential steps like thermal voltage calculation; jumps from given data to final answer; no derivation for Boolean expressions in parity circuits |
| Practical interpretation | 20% | 10 | Interprets dependent source power direction (absorbing/supplying); comments on diode operating point and temperature sensitivity; discusses generator efficiency in context of Indian railway/rural electrification standards; analyzes op-amp saturation limits and load regulation; relates parity to communication error detection (e.g., in ISRO data links) | Brief mention of physical significance without elaboration; generic statements about efficiency or error detection; no connection to real-world applications or engineering trade-offs | Purely mathematical treatment with no physical interpretation; ignores sign conventions for power; no discussion of why results matter practically; treats all parts as abstract exercises |
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