Q4
(a) In the circuit diagram given here, load resistance R_L is to be set for maximum power transfer. Draw Thevenin equivalent circuit across ab and calculate the value of R_L for maximum power transfer. Also calculate the power loss in resistance R_3, when the circuit is delivering maximum power to load R_L : (b) (i) Define input bias current and input offset voltage for an OPAMP. Using an OPAMP, draw an inverting amplifier circuit with gain = –4 in such a way that the effect of bias current is minimized. 10 (ii) In the linear regulated power supply circuit shown here, calculate the output voltage adjustment range and maximum power dissipation in transistor T₁ in worst case : (T₁ and T₂ are Si transistors) 10 (c) A circuit using three 2-input multiplexers is shown below. Determine the function performed by this circuit :
हिंदी में प्रश्न पढ़ें
(a) यहाँ दिए गए परिपथ आरेख में भार प्रतिरोध R_L को अधिकतम शक्ति अंतरण के लिए निर्धारित करना है। ab के आर-पार थेवेनिन समतुल्य परिपथ अंकित कीजिए और अधिकतम शक्ति अंतरण के लिए R_L के मान की गणना कीजिए। प्रतिरोध R_3 में शक्ति ह्रास की भी गणना कीजिए जब परिपथ, भार प्रतिरोध R_L को अधिकतम शक्ति प्रदान कर रहा हो : (b) (i) एक OPAMP के लिए निवेश बायस धारा और निवेश ऑफसेट वोल्टता को परिभाषित कीजिए। एक OPAMP का प्रयोग करते हुए एक प्रतिलोम प्रवर्धक परिपथ आरेखित कीजिए जिसकी लब्धि = –4 ऐसे हो कि बायस धारा का प्रभाव न्यूनतम हो। (ii) यहाँ प्रदर्शित रैखिक नियंत्रित शक्ति प्रदाय परिपथ में निर्गत वोल्टता समायोजन परास और सबसे खराब स्थिति में ट्रांजिस्टर T₁ में अधिकतम शक्ति क्षय की गणना कीजिए : (टी₁ और टी₂, Si ट्रांजिस्टर हैं) (c) 2 निवेशों वाले तीन मल्टीप्लेक्सरों का उपयोग करते हुए बनाया गया एक परिपथ नीचे प्रदर्शित है। इस परिपथ द्वारा निष्पादित कार्य ज्ञात कीजिए :
Directive word: Calculate
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How this answer will be evaluated
Approach
Calculate demands precise numerical solutions with systematic derivations. Structure: (a) Thevenin equivalent and maximum power transfer (~15 marks, 30% time) — draw equivalent circuit, find V_th, R_th, set R_L = R_th, compute power loss in R_3; (b)(i) OPAMP definitions and circuit design (~10 marks, 20% time) — define terms clearly, draw inverting amplifier with R_comp = R_1||R_f for bias current compensation; (b)(ii) Regulated supply calculations (~10 marks, 20% time) — determine V_out range using zener and potentiometer, find worst-case P_D in T_1; (c) Multiplexer logic analysis (~15 marks, 30% time) — construct truth table, derive Boolean expression, identify the combinational function implemented.
Key points expected
- For (a): Correct Thevenin voltage and resistance calculation; R_L = R_th for maximum power transfer; power loss in R_3 calculated using current division in loaded circuit
- For (b)(i): Precise definitions of input bias current (average of I_B+ and I_B-) and input offset voltage (V_os); inverting amplifier with gain -4 using R_f/R_in = 4, with compensation resistor R_p = R_in||R_f at non-inverting terminal
- For (b)(ii): Output voltage range from V_zener to V_zener×(1+R_2/R_1) or similar depending on circuit; maximum P_D in T_1 occurs at maximum input voltage, minimum output voltage, and maximum load current
- For (c): Complete truth table for 3-select-line multiplexer cascade; Boolean expression simplification; identification of function (e.g., full adder, comparator, or parity generator based on actual connections)
- Cross-cutting: Proper unit handling (V, mA, Ω, W); significant figures appropriate to component tolerances; mention of practical limitations like thermal runaway in series regulators
Evaluation rubric
| Dimension | Weight | Max marks | Excellent | Average | Poor |
|---|---|---|---|---|---|
| Concept correctness | 20% | 10 | Correctly applies maximum power transfer theorem (R_L = R_th, not R_L = 0 or ∞); accurately defines OPAMP parameters distinguishing bias current from offset current; properly identifies multiplexer as data selector with correct logic function derivation | Applies theorems with minor errors (e.g., confuses Thevenin with Norton); definitions present but imprecise; multiplexer function partially correct but incomplete truth table | Fundamental misunderstanding of maximum power condition; conflates bias current with offset voltage; incorrect logic function or no truth table provided |
| Numerical accuracy | 20% | 10 | All calculations precise to 2-3 significant figures; correct power loss in R_3 using loaded circuit current; accurate V_out range and P_D(max) with proper thermal units (W or mW); no arithmetic or algebraic errors | Most calculations correct with minor rounding errors; one sub-part has significant error (e.g., wrong current for power loss); correct methodology but execution flawed | Multiple calculation errors; incorrect formulas applied (e.g., P = V²/R used with wrong V); orders of magnitude wrong; missing units or incorrect units |
| Diagram quality | 20% | 10 | Clean Thevenin equivalent with V_th, R_th clearly labeled; standard OPAMP symbol with power supply pins implied, compensation resistor shown; regulator circuit with transistor pin identification (E,B,C); multiplexer block diagram with select lines, data inputs, output labeled | Diagrams present but missing labels or non-standard symbols; Thevenin equivalent lacks polarity marks; OPAMP drawn as triangle but pin numbers unclear; multiplexer connections readable but select line labels ambiguous | Missing required diagrams; incorrect circuit topologies (e.g., non-inverting instead of inverting amplifier); illegible sketches; no distinction between circuit diagram and equivalent circuit |
| Step-by-step derivation | 20% | 10 | Systematic derivation: open-circuit voltage → short-circuit current → R_th, or direct R_th calculation with sources deactivated; gain formula derived from virtual ground concept; multiplexer output Y = Σ(m_i·D_i) expanded with minterms; all steps explicitly shown | Derivation present but skips key steps (e.g., jumps to R_th without showing calculation); some steps implied rather than written; final formula correct but derivation incomplete | No derivation shown — only final answers stated; incorrect or circular reasoning; formulas stated without context or application to given circuit values |
| Practical interpretation | 20% | 10 | Notes efficiency limitation of 50% in maximum power transfer; explains why bias current compensation matters for precision applications (e.g., instrumentation amplifiers in ISRO payloads); identifies heat sink requirement for T_1 based on P_D(max); discusses propagation delay in multiplexer cascade for high-speed digital systems | Brief mention of practical relevance without elaboration; generic statements about power dissipation or OPAMP precision; no specific application context provided | No practical interpretation offered; purely theoretical treatment; misses obvious engineering implications (e.g., thermal damage risk in regulator, loading effects) |
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