Q1 50M Compulsory solve Circuit analysis, Z-transform, transistors, BCD error detection
(a) Find the voltage on points A and B of the given circuit : (10 marks)
(b) Determine the Z-transform of $x[n] = n\left(\frac{1}{2}\right)^{n+2} u[n+2]$. Specify the properties used. (10 marks)
(c) In the circuit diagram given here, T₁ and T₂ are transistors with matched characteristics. The transistor parameters in active region are β = 200 and V_BE = 688 mV. Find V_CE of transistor T₂ : (10 marks)
(d) A Binary Coded Decimal (BCD) code is to be transmitted to a remote receiver. Bits are arranged as A₃ A₂ A₁ A₀. Design a circuit at the receiving end which has an error detector to check the legal BCD code and produce a HIGH for any error condition. (10 marks)
(e) In the circuit given here, D₁ is an ideal diode and key K₁ is ON for a long period of time. Now at time t₀, key K₁ is opened. Draw the voltage waveform on capacitor C₁ and find the final steady-state voltage on the capacitor : L=10 mH, 9 V, K₁ Open at t₀, R₁=0·9 Ω, D₁, C₁=100 μF (10 marks)
Answer approach & key points
Solve each sub-part systematically with equal time allocation (~20% per part) since all carry equal marks. Begin with circuit analysis for (a), apply Z-transform properties for (b), use transistor biasing equations for (c), implement combinational logic for (d), and analyze transient response for (e). Present derivations first, followed by numerical calculations and diagrams where required.
- For (a): Apply KCL/KVL or nodal analysis to find voltages at points A and B; identify series-parallel combinations and current paths
- For (b): Use time-shifting property and differentiation property of Z-transform; rewrite x[n] as (1/4)·(n+2-2)(1/2)^(n+2)u[n+2] or apply shift then differentiate
- For (c): Analyze current mirror or differential pair configuration; use I_C = βI_B and V_CE = V_CC - I_C·R_C with matched transistor characteristics
- For (d): Design 4-input combinational circuit using K-map; detect illegal BCD states (1010-1111) with output HIGH for error; implement using NAND/NOR gates
- For (e): Determine initial capacitor voltage when K₁ is ON (diode conducts, inductor acts as short); analyze RLC transient when K₁ opens with diode reverse bias
Q2 50M draw CMOS gate design, signal integration, circuit analysis
(a) Draw the circuit diagram, function table, logic symbol and switch model for a CMOS gate (using six transistors) with two inputs A and B and an output Z, such that Z = 0 if A = 1 and B = 0, and Z = 1 otherwise (20 marks)
(b) For the signals f₁(t) and f₂(t) shown in the figures below, find and sketch $\int_{-\infty}^{t} f(x)\,dx$ : (20 marks)
(c) In the circuit given here, find the value of voltage $v_1$ : (10 marks)
Answer approach & key points
Begin with the directive 'draw' for part (a), which demands precise circuit diagrams, truth tables, and switch models for the 6-transistor CMOS gate implementing Z = NOT(A AND NOT(B)). Allocate approximately 40% of effort to part (a) given its 20 marks, 35% to part (b) for signal integration with proper sketching of ramp/step waveforms, and 25% to part (c) for the circuit analysis. Structure as: (a) complete CMOS characterization with all four required elements, (b) mathematical integration with graphical interpretation showing accumulation of area under curves, (c) systematic nodal/mesh analysis for v₁.
- Part (a): Correct identification of the logic function as Z = A' + B (OR gate with inverted A, or equivalently Z = NOT(A AND NOT(B))) with proper PMOS-NMOS network topology using exactly 6 transistors
- Part (a): Complete function table showing all four input combinations with correct output states, and accurate IEEE/ANSI logic symbol representation
- Part (a): Switch model clearly distinguishing conducting/non-conducting states for both pull-up (PMOS) and pull-down (NMOS) networks
- Part (b): Correct mathematical integration of f₁(t) and f₂(t) showing piecewise linear/quadratic results with proper handling of limits from -∞ to t
- Part (b): Accurate sketch of integrated signals showing ramp characteristics, continuity at transition points, and proper asymptotic behavior
- Part (c): Application of KCL/KVL or nodal analysis to solve for v₁, with identification of circuit topology (likely resistive divider, op-amp, or transistor circuit)
- Part (c): Correct numerical value with proper units and sign convention for v₁
Q3 50M solve Laplace transform, OPAMP circuits, digital logic
(a) Determine the time signal that corresponds to the following bilateral Laplace transform and the ROCs given below by using the method of partial fractions:
$$X(s) = \frac{4s^2 + 8s + 10}{(s+2)(s^2 + 2s + 5)}$$
(i) With ROC Re(s) < -2
(ii) With ROC Re(s) > -1
(iii) With ROC -2 < Re(s) < -1
(b) Explain the working of the given OPAMP circuit. Draw the output waveforms at points A and B showing the time and voltage.
Given that, $V_{Z_1} = V_{Z_2} = 3.3$ V, $C_1 = 1 \mu$F, the power supply voltage to OPAMPs is $\pm 12$ V and $R_1 = R_2 = R_3 = R_4 = R_5 = R_6 = 2$ k$\Omega$ :
Suggest to replace suitable resistances so that the output voltages at A and B are having swing of $\pm 6$ V and the output frequency is fixed to 500 Hz.
(c) Find the logic equations for the outputs in the concise form and write the corresponding truth table for the circuit given below :
Answer approach & key points
Solve this multi-part numerical problem by allocating approximately 40% time to part (a) for partial fraction decomposition and three ROC analyses, 35% to part (b) for OPAMP circuit analysis, waveform sketching and redesign calculations, and 25% to part (c) for logic equation derivation and truth table construction. Begin with clear partial fraction expansion in (a), apply bilateral Laplace transform pairs correctly for each ROC, then explain the astable multivibrator operation in (b) with proper timing calculations, and finally use Boolean algebra or K-map simplification in (c) before presenting the truth table.
- Part (a): Correct partial fraction decomposition of X(s) into A/(s+2) + (Bs+C)/(s²+2s+5) with A=2, B=2, C=0, yielding poles at s=-2 and s=-1±2j
- Part (a)(i)-(iii): Correct time-domain signals for each ROC — left-sided for Re(s)<-2, right-sided for Re(s)>-1, and two-sided for -2<Re(s)<-1 with proper handling of causal/anti-causal components
- Part (b): Identification of the circuit as an astable multivibrator (square wave generator) with Schmitt trigger and RC timing network, correct threshold voltages ±βVz where β=R2/(R1+R2)
- Part (b): Correct waveform sketches showing square waves at A (±Vz=±3.3V) and B (±Vsat≈±12V) with proper time periods, and redesigned values for ±6V swing at 500Hz using R5=R6=1kΩ or modified timing resistors
- Part (c): Derivation of simplified logic equations using Boolean algebra or K-maps, identification of circuit as a 3-bit binary to Gray code converter or similar standard combinational circuit
- Part (c): Complete truth table with all 8 input combinations showing correct output values for the derived logic equations
Q4 50M calculate Maximum power transfer, OPAMP circuits, multiplexers
(a) In the circuit diagram given here, load resistance R_L is to be set for maximum power transfer. Draw Thevenin equivalent circuit across ab and calculate the value of R_L for maximum power transfer. Also calculate the power loss in resistance R_3, when the circuit is delivering maximum power to load R_L :
(b) (i) Define input bias current and input offset voltage for an OPAMP. Using an OPAMP, draw an inverting amplifier circuit with gain = –4 in such a way that the effect of bias current is minimized. 10
(ii) In the linear regulated power supply circuit shown here, calculate the output voltage adjustment range and maximum power dissipation in transistor T₁ in worst case :
(T₁ and T₂ are Si transistors) 10
(c) A circuit using three 2-input multiplexers is shown below. Determine the function performed by this circuit :
Answer approach & key points
Calculate demands precise numerical solutions with systematic derivations. Structure: (a) Thevenin equivalent and maximum power transfer (~15 marks, 30% time) — draw equivalent circuit, find V_th, R_th, set R_L = R_th, compute power loss in R_3; (b)(i) OPAMP definitions and circuit design (~10 marks, 20% time) — define terms clearly, draw inverting amplifier with R_comp = R_1||R_f for bias current compensation; (b)(ii) Regulated supply calculations (~10 marks, 20% time) — determine V_out range using zener and potentiometer, find worst-case P_D in T_1; (c) Multiplexer logic analysis (~15 marks, 30% time) — construct truth table, derive Boolean expression, identify the combinational function implemented.
- For (a): Correct Thevenin voltage and resistance calculation; R_L = R_th for maximum power transfer; power loss in R_3 calculated using current division in loaded circuit
- For (b)(i): Precise definitions of input bias current (average of I_B+ and I_B-) and input offset voltage (V_os); inverting amplifier with gain -4 using R_f/R_in = 4, with compensation resistor R_p = R_in||R_f at non-inverting terminal
- For (b)(ii): Output voltage range from V_zener to V_zener×(1+R_2/R_1) or similar depending on circuit; maximum P_D in T_1 occurs at maximum input voltage, minimum output voltage, and maximum load current
- For (c): Complete truth table for 3-select-line multiplexer cascade; Boolean expression simplification; identification of function (e.g., full adder, comparator, or parity generator based on actual connections)
- Cross-cutting: Proper unit handling (V, mA, Ω, W); significant figures appropriate to component tolerances; mention of practical limitations like thermal runaway in series regulators
Q5 50M Compulsory solve Electromagnetic waves, transformers, power electronics, communication systems, transmission lines
(a) A uniform plane wave travels in vacuum along +y direction. The electric field of the wave at some instant is given as $\vec{E} = 4\hat{x} + 3\hat{z}$. Find the vector magnetic field $\vec{H}$. (Given, $\mu_0 = 4\pi \times 10^{-7}$ H/m, $\varepsilon_0 = \frac{1}{36\pi} \times 10^{-9}$ F/m) (10 marks)
(b) The maximum efficiency of a 200 kVA, 3300/600 V, 50 Hz, single-phase transformer is 98% and occurs at 75% full load and unity power factor. If the leakage impedance is 10%, find the voltage regulation at full load and power factor 0.8 lagging. (10 marks)
(c) A diode circuit with an L-C load is shown in the figure, with the capacitor having an initial voltage $V_C(t=0) = 120$ V, capacitance $C = 12$ μF and inductance $L = 48$ μH. If switch S is closed at $t = 0$ s, then find the following: (i) Peak value of current $i$ (ii) Conduction time of the diode (10 marks)
(d) How can linear pre-emphasis and de-emphasis filters be employed to improve the performance of an FM system? Is the improvement in output SNR dependent on both the frequency responses of the pre-emphasis filter and the de-emphasis filter? (10 marks)
(e) A transmission line is 25 m long. It has characteristic impedance Z₀ = 40 Ω and operates at 2 MHz. The line is terminated with a load of Z_L = (50 + j30) Ω. If the wave velocity is u = 0.8c (with c = 3×10⁸ m/s) on the line, determine (i) the reflection coefficient and (ii) the input impedance. (10 marks)
Answer approach & key points
Solve all five sub-parts systematically, allocating approximately 20% time to each part since marks are equal. Begin with clear statement of given data and required unknowns for each sub-part. Present derivations step-by-step with proper units, then substitute numerical values. For part (c), sketch the L-C circuit diagram showing diode, switch, inductor and capacitor with initial polarity. Conclude each part with boxed final answers and brief physical interpretation.
- Part (a): Apply Poynting vector relation; use η₀ = √(μ₀/ε₀) = 120π Ω; determine H = (1/η₀)(âₓ × E) with propagation in +y direction giving H = (3/120π)âₓ - (4/120π)â_z A/m
- Part (b): Calculate core loss and copper loss at maximum efficiency condition; use P_cu = x²P_cu,FL to find full-load copper loss; apply voltage regulation formula with leakage impedance to find % regulation ≈ 6.5%
- Part (c): Analyze underdamped RLC circuit; derive i(t) = (V_C/ω_dL)e^(-αt)sin(ω_d t); find peak current I_peak = V_C√(C/L) ≈ 60 A; conduction time = π/ω_d ≈ 48 μs until current returns to zero
- Part (d): Explain pre-emphasis boosts high frequencies before modulation matching FM noise triangle; de-emphasis attenuates highs after demodulation; SNR improvement depends only on de-emphasis filter matching noise spectrum, not pre-emphasis
- Part (e): Calculate reflection coefficient Γ = (Z_L - Z₀)/(Z_L + Z₀) = 0.35∠56.3°; find electrical length βl = 2πf/u = 0.418 rad; apply transmission line equation for input impedance Z_in = Z₀(Z_L + jZ₀tanβl)/(Z₀ + jZ_Ltanβl)
Q6 50M derive AM demodulation, FM signals, PWM inverters, induction motor characteristics
(a) (i) An AM signal s(t) = A_c[1 + k_a m(t)]cos(2πf_c t) is applied to the system shown in the figure. Show that the message signal m(t) can be obtained from the square-rooter output v₃(t): Assume that |k_a m(t)| < 1 for all t, the message signal m(t) is limited to the interval −ω ≤ f ≤ ω, and the carrier frequency f_c > 2ω. (10 marks)
(ii) A narrow band FM signal is approximately given as $$s(t) \approx A_c \cos(2\pi f_c t) - \beta A_c \sin(2\pi f_c t)\sin(2\pi f_m t)$$ Determine the envelope of this modulated signal. Also determine the ratio of the maximum to the minimum value of this envelope. Plot this ratio versus β, with β restricted to the interval 0 ≤ β ≤ 0·4. Also determine the average power of the narrow band FM signal, expressed as a percentage of the average power of the unmodulated carrier wave. (10 marks)
(b) (i) Explain why PWM inverters are preferred over square wave inverters. Further, draw the harmonic spectrum to highlight the differences in unipolar and bipolar PWM techniques. (10 marks)
(ii) A single-phase, full-bridge inverter has DC-link voltage $V_{DC} = 400$ V, and the fundamental frequency of 50 Hz. Find the r.m.s. value of the voltages of the fundamental and next two prominent harmonics for the following cases: (1) Square wave mode (2) Voltage cancellation mode with α = 20° (10 marks)
(c) A 50 hp, 440 V, 50 Hz, star-connected, three-phase induction motor has a starting torque of 75% and maximum torque of 250% of the full-load torque. Find the following: (i) Slip at which maximum torque occurs (ii) Slip at full-load torque (10 marks)
Answer approach & key points
Begin with a brief introduction acknowledging the three distinct domains: AM/FM demodulation, PWM inverter analysis, and induction motor characteristics. Allocate approximately 25% time to part (a) covering AM envelope detection and FM envelope/power calculations; 25% to part (b) on PWM advantages and harmonic analysis with spectra; 25% to part (c) on torque-slip characteristics; reserve 25% for diagrams, numerical verification, and conclusion. For (a)(i), derive the square-rooter output step-by-step; for (a)(ii), use trigonometric identities for envelope extraction; for (b), contrast unipolar/bipolar PWM spectra; for (c), apply the torque-slip equation T ∝ s/(r₂² + (sx₂)²).
- (a)(i) Derivation showing v₃(t) = A_c√[1+k_a m(t)] through squaring, filtering, and square-root operations with proper justification of LPF cutoff selection (f_c > 2ω)
- (a)(ii) Envelope derivation using A(t) = A_c√[1 + β²sin²(2πf_m t)], ratio (1+β)/(1-β) for small β, correct plot of ratio vs β (0 to 0.4), and power calculation showing ≈(1+β²/4)×100%
- (b)(i) PWM advantages: reduced harmonic distortion, adjustable output voltage via modulation index, better THD; clear harmonic spectrum comparison showing unipolar eliminates even harmonics and carrier multiples while bipolar has harmonics at mf_c ± nf_o
- (b)(ii) Square wave: V₁ = 0.9V_DC = 360V, V₃ = 120V, V₅ = 72V; Voltage cancellation: V₁ = (4V_DC/π)cosα = 428.5V, correct harmonic elimination pattern with α = 20°
- (c) Using T_max/T_fl = 2.5 and T_st/T_fl = 0.75 with torque-slip relation: slip at T_max s_max = r₂/x₂ = 0.183, full-load slip s_fl = 0.037 (or 0.163 if using approximate method), showing both exact and approximate solutions
- Proper use of Thevenin equivalent or approximate equivalent circuit for induction motor torque calculations with clear assumption statements
Q7 50M solve Power electronics, synchronous machines and electromagnetics
(a) (i) Draw the neat and properly labelled output voltage waveform of a three-phase, phase-controlled rectifier having firing angle α. Also derive the relationship for average output voltage in terms of line voltage V_LL and firing angle α. (10 marks)
(ii) A three-phase full-wave controlled rectifier is being operated from a star-connected, 415 V, 50 Hz supply. This rectifier is feeding a constant current load of 15 kW. It is required to obtain an average output voltage of 80% of maximum possible output voltage. Find the firing angle, r.m.s. value of line current and input power factor. Assume devices are ideal. (10 marks)
(b) (i) Show that the maximum power that a synchronous generator can supply when connected to constant voltage, constant frequency busbars increases with the excitation. (10 marks)
(ii) An 11 kV, 3-phase, star-connected turbo-alternator delivers 250 A at unity power factor when running on constant voltage and frequency busbars. If the excitation is increased so that the delivered current rises to 300 A, find the power factor at which now machine works and percentage increase in the induced e.m.f., assuming a constant steam supply and unchanged efficiency. The armature resistance is 0·5 Ω per phase and the synchronous reactance is 10 Ω per phase. (10 marks)
(c) A medium has infinite conductivity for z ≤ 0, ε_r = 7 and μ_r = 18, and σ = 0 for z > 0. The electric field for z > 0 is given as $\vec{E} = 10\cos(3 \times 10^8 t - 15x)\hat{z}$, as shown below. Determine the surface charge density and surface current density at location (3, 4, 0) at t = 0·8 ns. Given, $\mu_0 = 4\pi \times 10^{-7}$ H/m, $\varepsilon_0 = \frac{1}{36\pi} \times 10^{-9}$ F/m : (10 marks)
Answer approach & key points
Solve this multi-part numerical problem by allocating approximately 25% time to each of parts (a)(i), (a)(ii), (b)(ii), and (c), with part (b)(i) requiring brief theoretical proof. Begin with clear diagrams and derivations for the rectifier waveform, then proceed systematically through calculations for firing angles, power factors, and electromagnetic boundary conditions, concluding with physical interpretations of each result.
- For (a)(i): Correct three-phase bridge rectifier output waveform with 6-pulse ripple, proper labeling of firing angle α, conduction intervals, and phase voltages; derivation of V_avg = (3√3/π)V_LL cos(α) for continuous conduction
- For (a)(ii): Calculation of firing angle α = cos⁻¹(0.8) = 36.87°, RMS line current = 20.82 A, and input power factor = 0.8 lagging using proper relationships for constant current load
- For (b)(i): Proof that P_max = EV/X_s increases with excitation E, using power-angle characteristics and showing ∂P_max/∂E > 0 for constant V and X_s
- For (b)(ii): Calculation of new power factor = 0.833 lagging, percentage increase in induced EMF = 19.6%, using power balance with constant steam input and phasor diagrams
- For (c): Application of boundary conditions at z=0 for perfect conductor; surface charge density ρ_s = 83.14 nC/m² and surface current density J_s = -0.424 ŷ A/m at (3,4,0) using wave impedance and propagation constants
Q8 50M solve Electromagnetics, communication systems and power electronics
(a) In the figure given below, region 1 is the side of the plane y+z=1 containing the origin and in this region, μ_r₁ = 5. In region 2, μ_r₂ = 7. It is given that B⃗₁ = 3·0a⃗_x + 1·0a⃗_y (T). Determine B⃗₂ and H⃗₂. Given, μ₀ = 4π × 10⁻⁷ H/m : (20 marks)
(b) The message signal m(t) has a bandwidth of 20 kHz, a power of 20 W and a maximum amplitude of 8. It is desired to transmit this message through a channel to the destination with 80 dB attenuation and additive white noise with power spectral density $S_n(f) = \frac{N_0}{2} = 0.5 \times 10^{-12}$ W/Hz and achieve an SNR at the modulator output of at least 50 dB. What is the required transmitter power and channel bandwidth, if the modulation scheme employed is as under?
(i) DSB-SC AM
(ii) SSB AM
(iii) Conventional DSB AM with modulation index 0·6 (20 marks)
(c) An ideal DC-DC converter as shown in the figure has an input voltage of $V_s = 20$ V, the duty ratio $D = 0.25$ and the switching frequency is 20 kHz. The inductance $L = 150 \mu H$ and capacitance $C = 240 \mu F$. The average diode current is 1.2 A. Determine the following :
(i) Peak-peak ripple current of the inductor
(ii) Peak current through the switch S (10 marks)
Answer approach & key points
Solve this multi-part numerical problem by allocating approximately 40% time to part (a) on boundary conditions in magnetostatics, 40% to part (b) on AM modulation systems comparison, and 20% to part (c) on DC-DC converter analysis. Begin each part with stated governing equations, show complete derivations with unit tracking, and conclude with physically verified numerical answers.
- Part (a): Apply magnetic boundary conditions - normal component of B and tangential component of H are continuous across the interface; correctly identify normal vector to plane y+z=1 and decompose B₁ into normal and tangential components
- Part (b)(i): For DSB-SC AM, use (SNR)₀ = (P_T/P_R)×(P_m/N₀W) with P_R = P_T×10⁻⁸ (80 dB attenuation) and bandwidth = 2W = 40 kHz
- Part (b)(ii): For SSB AM, use same SNR formula but with bandwidth = W = 20 kHz and note 3 dB SNR advantage or equivalent power saving
- Part (b)(iii): For conventional AM with m=0.6, account for power in carrier and sidebands using η = m²/(2+m²), total transmitted power includes carrier power
- Part (c)(i): Calculate inductor ripple current using Δi_L = V_s(1-D)DT_s/L = V_sD(1-D)/(Lf_s) for buck converter operation
- Part (c)(ii): Determine peak switch current as I_L,avg + Δi_L/2 using relationship between average diode current and load current