Paper II — Q2
(a) The open-loop transfer function of a feedback control system incorporating a dead time element is given by: G(s) =…
The open-loop transfer function of a feedback control system incorporating a dead time element is given by: G(s) = (Ke^(-Ts))/(s(s+1)) where K > 0 and T > 0 are variable scalar parameters. For a given value of T, show that the closed loop system for all values will be K < K₀ where K₀ = ω₀ cosec (ω₀T), and ω₀ is the smallest value of ω satisfying the equation ω = cot (ωT). 20 marks
Compare I/O mapped I/O and memory mapped I/O interfacing techniques used in 8085 microprocessor. 10 marks
What are the operating modes of Port-A of 8255? Explain handshake operation in I/O ports. (4+3+3=10 marks)
In a parallel circuit, in one branch the current, I₁ = (100 ± 2) A and in the other branch the current, I₂ = (200 ± 5) A. Determine the total current considering the following errors: (i) Limiting error (ii) Probable error. Comment upon the results as well. (2+6+2=10 marks)
हिंदी में प्रश्न पढ़ें
एक पुनर्निवेश नियंत्रण प्रणाली के विवृत-पाश अंतरण फलन में सम्मिलित मृत समय तत्व (डेड टाइम एलिमेंट) निम्न प्रकार है: G(s) = (Ke^(-Ts))/(s(s+1)) जहाँ K > 0 एवं T > 0 अस्थिर अविश प्राचल हैं। प्रदर्शित कीजिए कि T के दिए गए किसी मान के लिए, संयुक्त पाश प्रणाली के सभी मान K < K₀ होंगे जहाँ K₀ = ω₀ cosec (ω₀T), और ω₀ = ω का न्यूनतम मान है, जो समीकरण ω = cot (ωT) को संतुष्ट करता है।
8085 सूक्ष्म संसाधित्र में प्रयुक्त I/O तलरूपित I/O एवं स्मृति तलरूपित I/O अंतरापृष्ठ तकनीकों की तुलना कीजिए।
8255 के द्वार-A की संचालन प्रणालियाँ क्या हैं? I/O द्वारों पर हस्तामिलन संचालन की व्याख्या कीजिए।
एक समांतर परिपथ की एक शाखा में I₁ = (100 ± 2) A एवं दूसरी शाखा में I₂ = (200 ± 5) A धाराएँ हैं। निम्नलिखित त्रुटियों को ध्यान में रखते हुए कुल धारा का निर्धारण कीजिए: (i) सीमांत त्रुटि (ii) संभावित त्रुटि। परिणामों पर टिप्पणी भी कीजिए।
Model answer
Written by UPSC Answer Check against this question's marking rubric, to the expected length. UPSC does not publish answers for Mains — this is one way to score well, not an official key.
Stability Analysis of System with Dead Time
The characteristic equation for the unity feedback system is 1 + G(s) = 0, giving: s(s+1) + K e^-Ts = 0
At the marginal stability boundary, substituting s = jω: jω(jω + 1) + K e^-jω T = 0 implies -ω² + jω + K(cosω T - jsinω T) = 0
Separating into real and imaginary parts: Real Part: K cos(ω T) = ω² ...(1) Imaginary Part: K sin(ω T) = ω ...(2)
Dividing equation (1) by equation (2): (K cos(ω T))/(K sin(ω T)) = (ω²)/(ω) implies cot(ω T) = ω
From equation (2), the gain at the boundary is: K = (ω)/(sin(ω T)) = ω cosec(ω T)
Because the phase angle of the loop transfer function ∠ G(jω) = -90^° - tan⁻¹ω - ω T monotonically decreases with ω, the phase crossover frequency corresponding to ∠ G(jω) = -180^° is governed by the fundamental, smallest positive root ω₀ of the equation ω = cot(ω T). For closed-loop stability, the gain margin requires K < K₀, where K₀ = ω₀ cosec(ω₀ T).
Comparison of I/O Interfacing Techniques in 8085
| Parameter | I/O Mapped I/O (Peripheral Mapped) | Memory Mapped I/O | | :--- | :--- | :--- | | Address Space | 8-bit address (2⁸ = 256ports), isolated from memory. | 16-bit address (2¹⁶ = 64 KB), shared with memory space. | | Control Signals | Generates IOR̄ and IOW̄ via IO/M̄=1, RD̄, WR̄. | Generates MEMR̄ and MEMW̄ via IO/M̄=0, RD̄, WR̄. | | Instruction Set | Limited exclusively to IN and OUT instructions. | Arithmetic/logical instructions operate directly (LDA, STA, MOV, ADD M). | | Accumulator Role | Data transfer occurs only through the Accumulator. | Data can be transferred between any register and the I/O port. | | Hardware & Speed | Simpler decoding (8 lines), but slower for block data manipulation. | Complex decoding (16 lines), higher execution flexibility and speed. |
8255 Port-A Operating Modes and Handshaking
Port-A of the 8255 Programmable Peripheral Interface operates in three distinct configurations: Mode 0 (Basic I/O without handshaking), Mode 1 (Strobed I/O with control signals), and Mode 2 (Strobed Bidirectional Bus using Port C pins for handshaking).
Handshake operation synchronizes asynchronous peripherals with the microprocessor. For Input Handshake:
- Peripheral places data on Port A and asserts Strobe (STB̄).
- 8255 latches data and raises Input Buffer Full (IBF).
- 8255 asserts Interrupt Request (INTR) to CPU.
- CPU reads data via RD̄, resetting IBF and INTR.
For Output Handshake:
- CPU writes data via WR̄, causing 8255 to assert Output Buffer Full (OBF̄).
- Peripheral accepts data and returns Acknowledge (ACK̄).
- 8255 raises INTR to request the next byte.
Current Summation and Error Analysis
Nominal total current: I = I₁ + I₂ = 100 + 200 = 300 A.
Limiting Error: Absolute limiting error represents the worst-case arithmetic sum: δ I = ±(δ I₁ + δ I₂) = ±(2 + 5) = ± 7 A I = (300 ± 7) A (Relative Limiting Error = 7/300 × 100 = ± 2.33%)
Probable Error: Assuming normal distribution, the combined probable error is determined via Root-Sum-Square (RSS): r = ±√(r₁² + r₂²) = ±√(2² + 5²) = ±√29 ≈ ± 5.39 A I = (300 ± 5.39) A (Relative Probable Error = 5.39/300 × 100 = ± 1.80%)
The limiting error gives an overly conservative worst-case boundary by assuming simultaneous extreme deviations in both branches. Conversely, probable error accounts for the statistical likelihood of error cancellation among uncorrelated variables, yielding realistic tolerance bounds essential for precision metering in Indian power grid substations conforming to CEA measurement standards.
What "Compare" is asking you to do
Set the items against each other on named dimensions. In UPSC practice compare already carries both halves — likeness and difference — and where the stem names the dimensions, as in region, nature and climatic impact, those are the headings the examiner expects to see.
Structure that answers it
Dimensions named → both items on dimension 1 → dimension 2 → dimension 3 → where they converge and where they part
Where marks are lost
Two self-contained descriptive blocks with the comparison left for the reader to make. Marks here sit on the dimensions, so an answer that names none of them gives the examiner nothing to award.
How this answer will be evaluated
Approach
(a) derive: given > assumptions > stepwise derivation > result > check | (b(i)) compare: paired headings or table > key differences > significance > conclusion | (b(ii)) explain: definition/context > points in order > small example > short close | (c) calculate: given > formula > substitution > result with units > interpretation Full marks: Comprehensive and accurate with clear derivations, comparisons, and calculations.
Key points expected
- Apply Routh-Hurwitz criterion to the characteristic equation
- Approximate dead time e^(-Ts) using Padé approximation
- Identify the critical gain K0 in terms of ω0
- Show ω0 satisfies the transcendental equation ω = cot(ωT)
- Define both I/O mapped and memory mapped I/O
- Compare address space usage
- Compare instruction sets used
- Discuss speed and flexibility differences
Evaluation rubric
Each sub-part is marked on its own, against the marks and word limit printed on the paper.
- (a) Derive the stability limit K < K0 for the given transfer function with dead time. 20 marks
derive— given → assumptions → stepwise derivation → result → check
Must cover
- Apply Routh-Hurwitz criterion to the characteristic equation
- Approximate dead time e^(-Ts) using Padé approximation
- Identify the critical gain K0 in terms of ω0
- Show ω0 satisfies the transcendental equation ω = cot(ωT)
Loses marks
- Skipping the Padé approximation step
- Incorrect application of Routh-Hurwitz criterion
- Failing to link K0 to the transcendental equation
Earns more
- Explicitly state the Routh array
- Show the step-by-step algebraic manipulation
- Mention the physical significance of the stability limit
Extra mark
- Provide a Bode plot or Nyquist plot illustrating the stability margin
- (b(i)) Compare I/O mapped I/O and memory mapped I/O in 8085 microprocessor. 10 marks
compare— paired headings or table → key differences → significance → conclusion
Must cover
- Define both I/O mapped and memory mapped I/O
- Compare address space usage
- Compare instruction sets used
- Discuss speed and flexibility differences
Loses marks
- Confusing the address space allocation
- Failing to mention specific 8085 instructions
- Lack of clear distinction between the two methods
Earns more
- Provide a table summarizing the comparison
- Mention specific 8085 instructions for each method
- Discuss the impact on system design
Extra mark
- Include a block diagram showing the interfacing of both methods
- (b(ii)) Explain the operating modes of Port-A of 8255 and handshake operation in I/O ports. 10 marks
explain— definition/context → points in order → small example → short close
Must cover
- List the operating modes of Port-A
- Describe the handshake operation in I/O ports
- Explain the role of control signals in handshake
- Provide a sequence of operations for handshake
Loses marks
- Omitting the control signals in the handshake explanation
- Failing to describe the sequence of operations
- Confusing the operating modes of Port-A
Earns more
- Include a timing diagram for the handshake operation
- Mention the specific control signals (e.g., STB, OBF, ACK)
- Discuss the advantages of handshake operation
Extra mark
- Provide a block diagram of the 8255 with Port-A in handshake mode
- (c) Calculate the total current in a parallel circuit considering limiting and probable errors. 10 marks
calculate— given → formula → substitution → result with units → interpretation
Must cover
- Calculate the total current using the given values
- Determine the limiting error for the total current
- Determine the probable error for the total current
- Comment on the results
Loses marks
- Incorrect calculation of the total current
- Failing to distinguish between limiting and probable errors
- Lack of interpretation of the results
Earns more
- Show the step-by-step calculation for both errors
- Provide a clear interpretation of the results
- Mention the significance of the errors in practical applications
Extra mark
- Include a graphical representation of the error distribution
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Write your answer and it is marked point by point against the model answer above — what you covered, what you missed, what you got wrong.
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