UPSC Electrical Engineering 2026 — Paper II

(a) From the second-order unity-feedback system G(s) = K/[s(s+q)], 'evaluate' means compute two numbers: K and q, from the two given transient specifications settling time t_s = 6 s and peak overshoot M_p = 20%. Both damping ratio and undamped natural frequency must be extracted first. (b) Hand-execute the six-instruction 8085 routine, state the byte finally stored at memory location 00FFH, and separately give the state of all five flags (S, Z, AC, P, CY) after the last arithmetic operation. Both parts must be answered. (c) Using the voltmeter-ammeter method R = V/I, propagate the two stated probable errors through a quotient and find the probable error in the computed resistance, both as a percentage and in ohms. (d) Three explicit demands: (i) describe the saturated-reactor compensator using a circuit diagram AND its V-I characteristic, (ii) state how a lower (flatter) slope of the V-I characteristic is obtained, and (iii) list its main features. All three must appear. (e) Two sub-parts, 5 marks each: (i) draw the transition-probability (channel) diagram for the 2-input, 3-output channel matrix given, and (ii) with equiprobable inputs and p = 0.2, compute the three output probabilities P(y1), P(y2), P(y3).

• M_p = exp(−πζ/√(1 − ζ²)) = 0.2 gives ζ = 0.456
• t_s = 4/(ζω_n) (2% band) gives ω_n = 1.46 rad/s
• Matching s² + qs + K with s² + 2ζω_n s + ω_n²: K = ω_n², q = 2ζω_n
• K = 2.14 and q = 1.33
• ABH + 0FH = BAH (in A after ADD B)
• SBI 02H: BAH − 02H − CY = B8H, and CY = 0 after the ADD
• STA stores B8H at 00FFH
• Flags after SBI: S = 1, Z = 0, P = 1, CY = 0, AC = 1
• R = V/I = 33.3 Ω
• Root-sum-square law for a quotient: ΔR/R = √((ΔV/V)² + (ΔI/I)²)
• Relative errors 4% and 20%
• ΔR/R ≈ ±20.4%, ΔR ≈ ±6.8 Ω
• Working principle: iron core operated in saturation, nearly constant voltage with widely varying current, passive self-regulation
• Circuit diagram: transformer, saturated reactor with slope-correcting series capacitor, fixed capacitor bank
• V-I characteristic: linear to the knee at about 1 pu, then a small slope; lower slope obtained by the series slope-correcting capacitor
• Features: fast, passive, no control loop, robust; drawbacks of harmonics (twin-tripler compensation), heavy iron, losses, noise
• Diagram: x₁ → y₁ (1 − p) and y₂ (p); x₂ → y₂ (p) and y₃ (1 − p); a binary erasure channel
• P(y_j) = Σ P(x_i)P(y_j|x_i) with P(x₁) = P(x₂) = 0.5
• P(y₁) = 0.4 and P(y₃) = 0.4
• P(y₂) = 0.2 and the sum is 1

(a) From the block diagram, reduce the loop to a closed-loop transfer function and determine the complete time-domain response c(t) to a unit step input, i.e. carry out the inverse Laplace transform and state c(t) explicitly. (b(i)) Two demands: explain the function of the five named 8085 pins (READY, SID, SOD, INTR, CLK OUT), and separately describe the role of three internal units - the instruction decoder, the stack pointer and the program counter. All eight items must be covered. (b(ii)) Draw the complete 8085 timing diagram for MVI B, 05H with the opcode at 220AH and the data byte at 220BH, showing every control and status signal (ALE, RD-bar, WR-bar, IO/M-bar, S1, S0) across both machine cycles and all seven T-states. (c) Convert each voltmeter's sensitivity (ohm/volt) and range into its input resistance, place it across the 150 kilo-ohm arm of the given divider and compute the reading of EACH voltmeter; the loading error should be brought out.

• Closed-loop transfer function C/R = 2(s + 1)/(s² + 2s + 2)
• C(s) = 2(s + 1)/[s(s² + 2s + 2)] and partial fractions 1/s − s/((s + 1)² + 1)
• c(t) = 1 + e^(−t)(sin t − cos t) for t ≥ 0
• Checks: c(0) = 0, c(∞) = 1, ζ = 0.707, peak 1.208 at 1.571 s
• READY: input for slow devices, wait states; SID and SOD: serial input and output via RIM and SIM
• INTR: maskable, level-sensitive, non-vectored interrupt request sampled at the end of each instruction, enabled by EI
• CLK (OUT): system clock at half the crystal frequency
• Instruction decoder (decodes the opcode and drives control signals), 16-bit SP (top of stack, PUSH/POP/CALL/RET), 16-bit PC (next instruction address)
• Two machine cycles: opcode fetch M₁ (4 T-states) and memory read M₂ (3 T-states), 7 T-states in all
• Address 22H on A₁₅–A₈ and low byte 0AH (then 0BH) on AD₇–AD₀ with ALE high in T₁
• IO/M = 0; S₁S₀ = 11 in M₁ and 10 in M₂; RD low in T₂–T₃ of each cycle; WR stays high
• Opcode XXH read in M₁ and decoded in T₄; data 05H read in M₂
• Input resistances 200 kΩ and 3 MΩ
• Voltmeter in parallel with 150 kΩ (85.7 kΩ and 142.9 kΩ)
• V₁ = 44.4 V and V₂ = 64.5 V
• True voltage 66.7 V, so loading errors of about −33% and −3%

(a(i)) Given that c(t) = 1 - e^(-0.5t) is the unit STEP response, find (a) the unit impulse response and (b) the unit ramp response of the same system, with zero initial conditions. Two answers are required. (a(ii)) Solve the homogeneous state equation x-dot = Ax with A = [[0,1],[-1,-2]] and x(0) = [1, 0]^T, i.e. compute the state transition matrix e^(At) and hence x1(t) and x2(t). (b) For an electrodynamometer wattmeter with the pressure coil connected on the load side, compute the percentage error in the reading arising from (a) the inductance of the pressure coil and (b) the pressure-coil power loss that the current coil also carries, and then comment on the result (including why the current-coil resistance matters for the alternative connection). (c) Three demands: classify the 8085 interrupts (hardware/software, vectored/non-vectored, maskable/non-maskable with priorities and vector addresses); explain the use of EI and DI; and give the bit-by-bit meaning of the accumulator for SIM and for RIM.

• Transfer function G(s) = 0.5/(s + 0.5) from C(s) = 0.5/[s(s + 0.5)] with R(s) = 1/s
• Impulse response g(t) = 0.5e^(−0.5t), t ≥ 0
• Ramp response c_r(t) = t − 2 + 2e^(−0.5t), t ≥ 0, via partial fractions or integrating the step response
• Checks such as c_r(0) = 0, or time constant 2 s and steady-state ramp error 2
• (sI − A) and its determinant (s + 1)², repeated eigenvalue −1
• (sI − A)⁻¹ = [[s + 2, 1], [−1, s]]/(s + 1)²
• State transition matrix e^(At) = e^(−t)[[1 + t, t], [−t, 1 − t]]
• x₁(t) = (1 + t)e^(−t) and x₂(t) = −te^(−t)
• True power 2000 W; X_p = 18.85 Ω and β = tan⁻¹(X_p/R_p) ≈ 0.216°
• Inductance error from cos²β(1 + tan φ tan β) ≈ 1.0065, about +0.65% (reading ≈ 2013 W)
• Pressure-coil loss V²/R_p = 8 W, about +0.40%
• Total reading ≈ 2021 W, error ≈ +1.05% (reads high for lagging load)
• Comment: error grows with tan φ, sign reverses for leading load, compensation possible; the 0.4 Ω CC resistance matters for the supply-side connection (I²R = 160 W, +8%)
• TRAP 0024H (non-maskable, highest), RST 7.5 003CH, RST 6.5 0034H, RST 5.5 002CH, INTR (non-vectored, lowest); software RST 0–7 at 8n
• EI (FBH) enables and DI (F3H) disables the maskable interrupts; DI does not affect TRAP; auto-disabled on acceptance and reset
• SIM: D0–D2 mask bits M5.5, M6.5, M7.5, D3 MSE, D4 R7.5 reset, D5 unused, D6 SOE, D7 SOD
• RIM: D0–D2 current masks, D3 IE, D4–D6 pending I5.5, I6.5, I7.5, D7 SID

(a) Design a PI controller (find Kp and Ki) so that the unity-feedback system with G(s)H(s) = 10/[(s+2)(s+3)] has dominant closed-loop poles with zeta = 0.6 and omega_n = 4 rad/s, and then write down the resulting characteristic equation. (b(i)) Write 8085 assembly code that programs counter 0 of an 8253/8254 (control word register 2DH, counter 0 at 2BH) first in Mode 3 and then in Mode 2, so that a 1 MHz input clock produces a 1 kHz output; the count value and both control words must be computed. (b(ii)) Three demands: draw the hardware interfacing scheme of an 8255 with the 8085; derive the mode-0 control word that makes Port A and Port C inputs and Port B an output; and write the assembly program that reads two numbers from Ports A and C, adds them and outputs the sum on Port B. (c) From two (temperature, resistance) data points fit the thermistor law R_T = p R_0 e^(b/T): first evaluate the constants b and p, then use them to compute the resistance at 70 deg C and at 120 deg C, i.e. the range of resistance to be measured.

• Characteristic equation with PI: s³ + 5s² + (6 + 10K_p)s + 10K_i = 0
• Dominant pair from s² + 4.8s + 16 = 0, i.e. s = −2.4 ± j3.2, with the third pole placed at s = −p
• Coefficient matching gives p = 0.2, K_p = 1.096, K_i = 0.32
• Final characteristic equation s³ + 5s² + 16.96s + 3.2 = 0 = (s² + 4.8s + 16)(s + 0.2)
• Count N = 1 MHz/1 kHz = 1000 = 03E8H, loaded low byte E8H then high byte 03H
• Control words 36H (Mode 3) and 34H (Mode 2) for counter 0, LSB then MSB, binary
• Program: MVI A/OUT 2DH for the control word, then two OUT 2BH for the count, for each mode
• Output description: square wave in Mode 3, one-clock-wide low pulse every 1000 clocks in Mode 2
• Interface scheme: AD0–AD7 to D0–D7, 74LS373 latch with ALE, A0 and A1 to the 8255, RD, WR and RESET to the 8255
• Chip select from A2–A7 and IO/M giving addresses 00H–03H
• Control word 99H (D7 = 1, PA in, PC upper in, PB out, PC lower in, mode 0)
• Program: MVI A,99H; OUT 03H; IN 00H; MOV B,A; IN 02H; ADD B; OUT 01H
• Temperatures converted to kelvin (273, 333, 343, 393), with R₀ = 4290 Ω at the ice point
• b = ln(980/4290)/(1/333 − 1/273) ≈ 2237 K and p = e^(−b/273) ≈ 2.76 × 10⁻⁴
• R(70 °C) ≈ 806 Ω and R(120 °C) ≈ 351 Ω
• Range about 351–806 Ω (a change of about 455 Ω), decreasing with temperature (NTC)

(a) From the given series R-L-C circuit driven by V(t), choose the state variables, apply KVL and the capacitor current relation, and write the complete state-space model in standard matrix form x-dot = Ax + Bu (with an output equation if the capacitor voltage is taken as output). (b) Two computations: (a) the oscilloscope terminal voltage V_i at 100 Hz for a 1 V source with 600 ohm source resistance loaded by 1 M-ohm in parallel with the total shunt capacitance, and (b) the frequency at which V_i falls 3 dB below V_s. (c) Two demands: (a) calculate the number of restraining-coil turns that balances a percentage differential relay with CT secondary currents 3.4 A and 3.0 A and an operating coil of 400 turns, and (b) explain why biasing (restraint) is needed at all. (d) Two demands: list the modes of operation of an HVDC system, and then set out, in correct chronological order, the sequence of events following a large disturbance near an inverter running on constant extinction angle (CEA) control on a heavily loaded link. (e) For a delta modulator sampling at three times the Nyquist rate of a 3 kHz signal with step size 250 mV: (i) find the largest amplitude of a 1 kHz sinusoid that avoids slope overload, and (ii) find the post-filtered output signal-to-quantizing-noise ratio for that signal.

• State variables v_C and i (two energy stores)
• Capacitor relation C dv_C/dt = i and KVL V = Ri + L di/dt + v_C
• Matrix form A = [[0, 1/C], [−1/L, −R/L]], B = [0, 1/L]ᵀ
• Output y = [1 0]x with D = 0
• Total shunt capacitance 30 + 100 = 130 pF in parallel with 1 MΩ
• V_i/V_s = [R_i/(R_i + R_s)]/[1 + jω(R_s ∥ R_i)C], with τ ≈ 7.8 × 10⁻⁸ s
• V_i at 100 Hz ≈ 0.9994 V ≈ 1 V (ωτ negligible)
• 3 dB frequency f = 1/(2πτ) ≈ 2.04 MHz
• Operating current 0.4 A (difference) and restraining current 3.2 A (mean)
• Balance N_op(I₁ − I₂) = N_r(I₁ + I₂)/2 giving N_r = 50 turns
• Biasing needed because CT ratio errors, saturation and tap changes give spurious differential current on through-faults
• Restraint proportional to through current makes the pick-up rise with current, keeping stability and sensitivity
• Modes: monopolar (earth or metallic return), bipolar, homopolar
• Normal control: CC at rectifier, CEA at inverter, VDCOL
• Chronology: ac voltage dip, inverter dc voltage falls and I_d rises, overlap increases and γ falls
• Commutation failure when γ < γ_min, bridge short-circuit, dc voltage collapse, current surge, VDCOL and CC action, then recovery or blocking
• f_s = 3 × 6 kHz = 18 kHz
• A_max = Δf_s/(2πf_m) ≈ 0.716 V
• Noise power (Δ²/3)(W/f_s) ≈ 3.47 × 10⁻³ W, signal power A²/2 ≈ 0.2565
• SQNR ≈ 73.9, i.e. 18.7 dB

(a) Treat the 400 km line as a long transmission line, compute its ABCD constants from the distributed parameters, find the sending-end voltage, current and power for the stated receiving-end load, and hence determine the transmission efficiency. (b) Three sub-parts: (i) construct the Huffman code for the source {0.7, 0.15, 0.15} and show that L = 1.3 bits/symbol; (ii) form the second-order extension (9 symbols), apply Huffman and show that L2/2 = 1.1975 bits/symbol; (iii) compare that with the entropy of the original source. (c) For a 3-phase fault between a 3-cycle circuit breaker and an unloaded transformer fed by a 20 MVA, 11 kV generator, determine the current the breaker must interrupt and the corresponding interrupting kVA, selecting the correct machine reactance and the speed-dependent multiplying factor.

• Z_c = √(z/y) ≈ 287.7∠−12.5° Ω and γl ≈ 0.1246 + j0.5617
• A = D ≈ 0.8555∠4.46°, B ≈ 157.4∠66.35° Ω, C ≈ 1.902 × 10⁻³∠91.36° S
• Per-phase V_R = 138.56 kV and I_R = 283 A at −31.79°, giving V_S ≈ 158.7 kV (274.8 kV line) and I_S ≈ 258.5 A
• P_S ≈ 112.8 MW at sending-end pf about 0.917, so η ≈ 88.7%
• Code 0, 10, 11 and L = 0.7 + 0.3 × 2 = 1.3 bits/symbol
• Extended probabilities 0.49, four of 0.105 and four of 0.0225, with the merging steps of the Huffman procedure
• Code lengths 1, 3, 3, 3, 4 and 6 (four times) giving L₂ = 2.395 and L₂/2 = 1.1975
• Entropy H ≈ 1.1813 bits/symbol; H ≤ L₂/2 < H + 1/2; efficiency about 98.6% against 90.9%
• Sub-transient reactance X″_d chosen, since the fault current comes only from the generator
• I_base = 1049.7 A and I″ = 1/0.10 = 10 pu = 10 497 A
• Multiplying factor 1.2 for a 3-cycle breaker
• Interrupting current ≈ 12.6 kA and interrupting kVA ≈ 240 MVA

(a) Compute the surge (natural) impedance of the line from its geometry, obtain the reflection and refraction coefficients at the 800 ohm per phase star-connected termination for a 33 kV travelling wave, and hence find the reflected power and the power absorbed at/through the termination. (b(i)) Two parts: (I) compute the entropy H(x) of the four-symbol memoryless source, and (II) compute the information content of the two specific four-symbol messages x1x2x1x3 and x4x3x3x2 and compare these with H(x). (b(ii)) Three parts on a (6,3) linear block code defined by the given parity check matrix: (I) determine the generator matrix G, (II) find the codeword whose message bits are 101, and (III) decode the received word 110110 by syndrome decoding. (c) Explain the operating principle of the Translay relay (a balanced-voltage pilot-wire differential feeder protection) supported by BOTH a circuit/connection diagram and a phasor diagram; healthy, external-fault and internal-fault behaviour must all be covered.

• Surge impedance Z₀ = 138 log₁₀(d/r) = 138 log₁₀(200) ≈ 318 Ω, with r = 1 cm
• ρ = (800 − 318)/(800 + 318) ≈ 0.431 and τ = 1 + ρ ≈ 1.431
• Reflected voltage 14.2 kV and transmitted voltage 47.2 kV
• Per phase P_i ≈ 3.43 MW, P_r ≈ 0.637 MW and P_t ≈ 2.79 MW, with P_i = P_r + P_t (three-phase totals 1.91 MW and 8.37 MW if all phases carry the wave)
• H(X) = −ΣP log₂P ≈ 1.846 bits/symbol with the four terms shown
• Message probabilities 0.0096 and 0.0012 from the product for a memoryless source
• Information I = −log₂P ≈ 6.70 bits and 9.70 bits
• Comparison with 4H ≈ 7.39 bits: first message below average and second above, with the reason
• Recognise H = [Pᵀ | I₃] and G = [I₃ | P] with rows 100110, 010011 and 001101
• Code word for message 101 is 101011
• Syndrome s = H rᵀ = (0, 1, 1)ᵀ for 110110
• Syndrome equals column 2 of H, so bit 2 is corrected, giving code word 100110 and message 100
• Circuit: a relay at each end, upper magnet with primary (from CT) and secondary windings, lower-magnet coil, disc, two pilot wires, secondary windings in opposition
• Healthy or external fault: E₁ = E₂, net emf zero, no pilot current, no torque
• Internal fault: net emf drives pilot current in the lower coils, flux Φ_L acts with Φ₁ and the torque ∝ Φ₁Φ_L sin α trips the breaker
• Phasor diagram showing I, Φ₁, E (lagging Φ₁ by 90°) and, for an internal fault, the net emf, pilot current and the angle between Φ₁ and Φ_L

(a) For a 2 cm diameter conductor inside an air gap (1 cm to 2 cm radius) surrounded by an insulating cylinder of relative permittivity 4 (2 cm to 4 cm radius) with an earthed sheath, find the rms conductor voltage at which the peak gradient in the AIR just reaches 33 kV/cm. (b(i)) Starting from the Shannon-Hartley capacity formula, take the limit as the bandwidth tends to infinity and SHOW that C(infinity) = S/(eta ln 2) = 1.44 S/eta bits per second, with eta/2 the two-sided noise power spectral density. (b(ii)) Compute the average probability of bit error of a coherently detected binary FSK system at 2.5 Mb/s, given a received carrier amplitude of 1 microvolt and a white Gaussian noise power spectral density of 10^-20 W/Hz. (c) Two linked demands: list the abnormal running conditions that a synchronous generator can experience (as distinct from internal faults), and for each discuss the protective scheme that guards against it. A condition-versus-protection mapping is expected.

• Layers identified: air from r = 1 cm to 2 cm and insulator from 2 cm to 4 cm, with the maximum air gradient at the conductor surface
• g_max = λ/(2πε₀r₁) and V = g_max r₁[ln(r₂/r₁) + (1/ε_r)ln(r₃/r₂)]
• V_peak = 33 × [ln 2 + (1/4) ln 2] ≈ 28.6 kV
• V_rms = V_peak/√2 ≈ 20.2 kV
• Noise power N = ηB and C = B log₂(1 + S/(ηB))
• Substitution x = S/(ηB) giving C = (S/η)(1/ln 2) ln(1 + x)/x
• Limit x → 0, ln(1 + x)/x → 1, so C_∞ = S/(η ln 2) = 1.44 S/η
• T_b = 0.4 μs, signal power A²/(2R) = 10⁻¹⁴ W and E_b = 4 × 10⁻²¹ J
• Noise density convention stated: N₀/2 = 10⁻²⁰, so N₀ = 2 × 10⁻²⁰ W/Hz
• P_e = Q(√(E_b/N₀)) for coherent orthogonal FSK
• E_b/N₀ = 0.2 and P_e = Q(0.447) ≈ 0.327
• Overload, unbalanced (negative-sequence) loading, loss of excitation and loss of synchronism
• Motoring/reverse power, overspeed, overvoltage or over-fluxing, cooling or bearing failure, rotor earth fault
• A protection for each: thermal relay/RTD, I₂²t negative-sequence relay, offset mho or field-failure relay, out-of-step relay, reverse-power relay, governor and overspeed trip, overvoltage and V/Hz relay, temperature and vibration detectors, field earth-fault relay
• Correct consequence for each (rotor heating, induction-generator action, turbine damage, insulation stress) and alarm versus delayed trip